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EE201: Digital Circuits and Systems 5 Digital Circuitry page 1 of 31 EE201: Digital Circuits and Systems Section 5 – Digital Circuitry 5.1 Classes - Bipolar Junction Transistors(BJTs) o TTL, LTTL, STTL, LSTTL o ECL, I(ntegrated)I(njection)L, D(Diode)TL - Metal Oxide Semiconductor (MOS) o PMOS, NMOS, CMOS 5.2 Operational Parameters 5.2.1 Voltage & Current V xy = Voltage x defined as either Input or Output = Voltage y defines either
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  EE201: Digital Circuits and Systems 5 Digital Circuitry page 1 of 31 EE201: Digital Circuits and Systems Section 5 – Digital Circuitry 5.1 Classes - Bipolar Junction Transistors(BJTs) o   TTL, LTTL, STTL, LSTTL   o   ECL , I (ntegrated) I (njection) L , D (Diode) TL  - Metal Oxide Semiconductor (MOS) o   PMOS , NMOS ,  CMOS   5.2 Operational Parameters 5.2.1 Voltage & Current V xy => Voltage x defined as either Input or Output => Voltage y defines either logic high or low I xy  => Current x defined as either Input or Output => Current y defines either logic high or low V IH => Min voltage at input which can be ‘read’ as a 1(high) V IL => Max voltage at input which can be ‘read’ as a 0(low) V OH => Min voltage at output which allows a 1(high) V OL => Max voltage at output which can be ‘read’ as a 0(low) I IH => Input current when input = 1 I IL => Input current when input = 0 I OH => Output current when output = 1 I OL => Output current when output = 0  EE201: Digital Circuits and Systems 5 Digital Circuitry page 2 of 31 5.2.2 Fan-out o   Max amount of inputs driven by output. Example Determine the Fan-out of an NAND only circuit given the following values: I OH  = 400 uA, I IH  = 60 uA, I OL  = 16 mA, I IL  = 1.6 mA During high condition => Each NAND gate provides 400 uA current at output Each NAND gate sources 60 uA current at input. 5V V IH  V IL  0V   Logic 1 Logic 0  EE201: Digital Circuits and Systems 5 Digital Circuitry page 3 of 31 Fan-out HIGH  = I OH  / I IH  = 400 / 60 = 6 (Rounded down since cannot drive part of a gate!) During low condition => Each NAND gate provides 16 mA current at output Each NAND gate sources 1.6 mA current at input. Fan-out LOW  = I OL  / I IL  = 16 / 1.6 = 10 Fan-out of NAND gate is the lower value… => Fan-out = 6 5.2.3 Propagation Delays o   Delay when switching from one logic level to another    o  t PHL  = Falling delay, delay incurred when output changes from High to Low. o  t PLH  = Rising delay, delay incurred when output changes from Low to High.  EE201: Digital Circuits and Systems 5 Digital Circuitry page 4 of 31 5.2.4 Power Requirements o   Usually the supply current I CC  is given => Power = V cc  * I cc   o  OR I CCH  and I CCL  are given. I CCH  : I CC  when all outputs HIGH I CCL  : I CC  when all outputs LOW o  Power determined by speed o  Charging and Discharging of Capacitances, etc. 5.2.5 Noise Immunity o   Circuit must be able to tolerate some noise at input without error    o   Calculate Noise Immunity of Circuit   o   Determine ‘how much’ Input Noise voltage can be tolerated without change in output state   o   Must be determined for both positive and negative noise   V IL  V OH  5VV IH  0V Logic 1 Logic 0 V OL   OUTPUT Voltage INPUT Voltage   Logic 0 Logic 1 V  NH  V  NL

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Jul 23, 2017
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