# 555-4013 f divider

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mConverter Circuitscd4013, ic555 l Frank Donald   June 23, 2014   v0 Comments 󰁁         Gadgetronicx  > Electronics  > Circuit diagrams and Schematic designs  > Converter Circuits  > Frequency divider circuit usingIC 555 and IC 4013 Frequency divider circuit using IC 555 and IC 4013  Frequency Divider Circuit  Ever came across a situation where you have only one source of signal with speciﬁc frequency and need to obtainsignal of several frequencies. If yes, this kind of circuit might be the one you need to use in your design. The abovecircuit was a frequency divider which is capable of dividing the input clock frequency by means of a certain factor. ThisFrequency divider circuit was built around Timer IC1 555 which feeds the source pulse and IC2 4013 a dual D type ﬂipﬂop which divides the incoming pulse frequency. WORKING OF FREQUENCY DIVIDER CIRCUIT: IC 555 was wired as an astable multivibrator and this forms the source of the clock pulse. We have been using thisAstable Multivibrator widely so i don’t need to brief up the working explanation. The output frequency produced by theMultivibrator depends on three components R1,R2 and C2. Changing the values of the above mentioned componentswill result in change of output frequency.  Pin diagram of IC 4013 IC 4013 is a dual D type ﬂip ﬂop consists of two ﬂip ﬂops which can be used in a independent manner. In a D Flip FlopD1 & D2 pins are meant for data input which can be either logic 1 or 0. CLK1 and CLK2 are the pins where the clockinput for Flip Flop 1 & 2 are fed. This is of edge triggered type so that it switch output states to sudden changes involtage levels. The S and C are Set and reset pins of the respective Flip Flops.To wire IC 4013 as a Frequency divider all we have to do is wire the complement pin Q’ to the data input D of the ﬂipﬂops. The feedback signal of the complement Q pin to the data input divides the clock signal frequency by half. Letstake a look at how the feedback works as a frequency divider.At the beginning Clock signal and the Q output of the D-type are logic 0. Q’ is the complement output of Q pin so at thiscase the Q’ pin will be of logic 1. Feedback from Q’ to Data D will make the input pin high. The arrival of ﬁrst rising edgetransfers the logic state at D to the Q pin and this in turn makes the pin goes high. High signal at the Q pin in turnmakes the Q’ pin to go low.The arrival of second edge makes the D low since the current state of Q’ is fed back to it. This makes the Q pin to lowstate and Q’ to high state. Thus the cycle continues with the following rising edges as the number of output pulses isdivided by two compared the number of input pulses and a frequency of F/2 is obtained.Connecting the next Flip ﬂop in such a way will give a signal of F/4 of the srcinal frequency of the pulse obtained fromthe Astable Multivibrator. Thus we can obtain F/8, F/16 signals by connecting the Flips Flops in continuous sequence. JLCPCB - Only \$2 for PCB Prototype (Any Color) 24 Hours fast turnaround, Excellent quality & Unbeatable prices Up to \$20 shipping discount on ﬁrst order now: https://jlcpcb.com/quote  ←  Previous postNext post →  Subscribe  Ask your query Start the discussion...

Sep 10, 2019

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