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A charge-based compact model for predicting the current-voltage and capacitance-voltage characteristics of heavily doped cylindrical surrounding-gate MOSFETs

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A charge-based compact model for predictingthe current–voltage and capacitance–voltagecharacteristics of heavily...
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Solid-State Electronics · January 2009
DOI: 10.1016/j.sse.2008.09.016
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A charge-based compact model for predicting the current–voltageand capacitance–voltage characteristics of heavily doped cylindricalsurrounding-gate MOSFETs
Feilong Liu
a,b
, Jian Zhang
a
, Frank He
a,b
, Feng Liu
b
, Lining Zhang
a,
*
, Mansun Chan
c
a
The Key Laboratory of Microelectronic Devices and Circuits, Ministry of Education, Peking University, Beijing 100871, PR China
b
The Key Laboratory of Integrated Microsystems, Shenzhen Graduate School of Peking University, Shenzhen 518055, China
c
ECE, Hong Kong University of Science and Technology, Clearwater Bay, Kowloon, Hong Kong
a r t i c l e i n f o
Article history:
Received 22 April 2008Received in revised form 6 August 2008Accepted 29 September 2008Available online 20 November 2008The review of this paper was arranged byProf. S. Cristoloveanu
Keywords:
Surrounding-gate MOSFETCompact modelDoping effectMOSFET performanceCircuit simulation
a b s t r a c t
This paper presents a charge-based compact model for predicting the current–voltage and capacitance–voltagecharacteristics of heavilydopedlong-channel cylindrical surrounding-gate(SRG)MOSFETs. Start-ing from Poisson’s equation with ﬁxed charge and inversion charge terms, a closed-form equation of inversion charge is obtained with the full-depletion approximation. Substituting this inversion chargeexpression into Pao-Sah’s dual integral, a drain current expression with concise form is derived. BasedontheWard-Duttonlinear-charge-partitionmethodandthecurrentcontinuityprinciple,alltrans-capac-itances are obtained analytically. The developed model is valid in all operation regions from the sub-threshold to strong inversion and from the linear to the saturation region without any smooth function.Themodelpredictionshavebeenextensivelycomparedwith3Dnumericalsimulationsandagoodagree-ment is observed in most of the operation regions with a wide range of geometrical parameters.
2008 Elsevier Ltd. All rights reserved.
1. Introduction
Cylindrical surrounding-gate (SRG) MOSFET has become one of the most promising device structures in the technology scalingroadmap. By surrounding the channel with the gate completely,excellentgatecontrol isachievedtosuppressshort-channeleffects(SCE) [1–3]. To study the performance of SRG MOSFETs in actual
circuits, ananalytical modelof SRGMOSFETsisrequired. However,most of the developed SRG MOSFET models are only valid forintrinsic or moderately doped channel [4–7]. There have been
some studies on the scaling properties and threshold voltagebehaviors for heavily doped SRG MOSFETs. Auth and Plummerhave presented a scaling theory for fully depleted cylindricalMOSFETs [1]; Oh et al. have proposed an analytical description of short-channel effects in fully-depleted SRG and double-gate (DG)MOSFETs [2]; however, a complete heavily doped SRG MOSFETcurrent–voltage model is not available yet. The signiﬁcance instudying heavily doped SRG MOSFET lies in two aspects. Like bulkMOSFET and DG MOSFET, doping in SRG MOSFET has been used toadjustthethresholdvoltageofthedevice[8].Also,asthetransistorsizes are scaling down continuously, any unintended impurity insuch a small device channel will greatly inﬂuence the effectivedoping density, in terms of the number of impurity atoms dividedby the volume [9]. Thus a compact model for heavily doped SRGMOSFETs is very important for device optimization and circuitsimulation.In this work, a compact modeling for doped SRG MOSFETs ispresented to predict the current–voltage and capacitance–voltagecharacteristics. Poisson’s equation in an N-channel SRG structureis solved with full-depletion approximation, and analytical draincurrent and trans-capacitances model are obtained in terms of inversion charge at source and drain terminals. The model predic-tion is compared with the 3D numerical simulation and the resultillustratestheproposedmodelisvalidinmostofthepracticalbias-ing and geometric conditions.
2. Model development
2.1. Inversion charge and drain current equation
The schematic cross-section and coordinate system of anN-channel SRG MOSFET being studied is shown in Fig. 1.
R
is the
0038-1101/$ - see front matter
2008 Elsevier Ltd. All rights reserved.doi:10.1016/j.sse.2008.09.016
*
Corresponding author. Tel.: +86 0755 26032014; fax: +86 0755 26035377.
E-mail address:
davidzhang196661@yahoo.com (L. Zhang).Solid-State Electronics 53 (2009) 49–53
Contents lists available at ScienceDirect
Solid-State Electronics
journal homepage: www.elsevier.com/locate/sse
radius of the silicon body and
V
gs
is applied to the gate with mid-gap work function.Following gradual channel approximation (GCA), the electro-static distribution in the silicon channel can be described by Pois-son’s equation as follows:
1
r
dd
r r
d
/
d
r
¼
qN
a
e
Si
e
b
ð
/
V
ch
2
/
f
Þ þ
1
ð
1
Þ
where
/
is the electrostatic potential,
N
a
represents the dopingconcentration,
e
Si
is the permittivity of silicon,
q
is the electriccharge,
b
¼
q
=
ð
kT
Þ
represents the reciprocal of thermal voltage,
/
f
¼
b
1
ln
ð
N
a
=
n
i
Þ
is the Fermi potential, and
V
ch
is the quasi-Fermipotential along the channel.
The gate voltage
V
gs
is divided between the oxide and the sur-face potential
/
s
at the silicon–oxide interface. According toGauss’s law, the boundary condition of Eq. (1) is
C
ox
ð
V
gs
D
/
/
s
Þ ¼
Q
in
þ
Q
dep
¼
e
Si
E
s
ð
2a
Þ
d
/
d
r
r
¼
0
¼
0
ð
2b
Þ
where
t
ox
representsoxidethickness,
e
ox
isthepermittivityofoxide,
R
is the radius of the cylindrical silicon body,
C
ox
¼
e
ox
=
ð
R
ln
ð
1
þ
t
ox
=
R
ÞÞ
is the oxide capacitance per unit gate area [4],
D
/
is the dif-ference of work function between the gate electrode and siliconbody.
Q
in
and
Q
dep
are theinversionchargeand ﬁxedchargedensityper unit gate area, respectively.
E
s
is the electric ﬁeld at the silicon–oxide interface.
Multiplying Eq. (1) by
r
2
d
/
and integrating from
/
0
to
/
withintegration-by-parts method, Eq. (1) can be written as
12
r
d
/
d
r
2
¼
qN
a
e
Si
b
r
2
e
b
ð
/
V
ch
2
/
f
Þ
Z
r
0
e
b
ð
/
V
ch
2
/
f
Þ
d
r
2
þ
qN
a
e
Si
Z
//
0
r
2
d
/
ð
3
Þ
Eq. (3) is an integral expression and can be performed only whenthe potential distribution is available. However, a general channelpotential solution, which is valid for all the doping concentrationsand operation regions, has not been published to our knowledge.For the doped case we discussed, the full-depletion approximationcan be obtained with neglecting the exponential term on the righthand side (RHS) of (1) [1,2]
/
ð
r
Þ ¼
/
0
þ
qN
a
r
2
4
e
Si
ð
4
Þ
This approximation is widely used in the research on the multiple-gate MOSFET [10] and highly doped double-gate SOI MOSFET re-cently [8]. When the doping concentration of the silicon channelis high (
P
10
17
cm
3
), the dopant density is much larger than elec-tron density and the latter can be neglected. Thus it is feasible toadopt this relationship in this work, which focuses on the heavilydoped case.
Differentiating both sides of Eq. (4) and substituting it into Eq.(3),theintegralcanbecompleted.Thentheevaluationoftheresultat the silicon–oxide interface leads to the surface electric ﬁeld
E
s
¼
ﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃﬃ
Q
dep
e
Si
2
b
R
½
1
e
b
ð
/
0
/
s
Þ
4
b
R
e
b
ð
/
s
V
ch
2
/
f
Þ
þ
Q
dep
e
Si
2
s
ð
5
Þ
where
Q
dep
=
qN
a
R
/2is ﬁxedchargedensityperunitgatearea. Com-biningEqs.(5)and(2a),thefollowingnormalizedequationintermsof inversion charge can be achieved:
v
gs
v
th
0
D
v
th
v
ch
¼
q
in
þ
ln
q
in
þ
ln
ð
q
in
þ
2
q
dep
Þ ð
6
Þ
where
v
gs
¼
b
V
gs
normalized gate voltage;
v
th
0
¼
b
D
/
þ
2
b/
f
þ
q
dep
ln
4
q
dep
e
Si
C
ox
R
normalized threshold voltage similar to bulk MOS-FETs in [11];
D
v
th
¼
ln 1
2
e
Si
q
dep
C
ox
R
1
e
q
dep
C
ox
R
=
2
e
Si
h i
normalizedchange quantity of threshold voltage induced by the special geo-metrical structure of SRG MOSFETs;
v
ch
¼
b
V
ch
normalized quasi-Fermipotentialalongthechannel;
q
in
¼
b
C
ox
Q
in
normalizedinversioncharge density;
q
dep
¼
b
C
ox
Q
dep
normalized ﬁxed charge density.
t
gs
,
t
th
0
,
D
v
th
, and
t
ch
are normalized by multiplying the factor
b
whereas
q
in
and
q
dep
are normalized by multiplying
b
=
C
ox
.
Eq. (6) is very similar to the charge control equation developedbyIñíguezet al. forundopedSRGMOSFETs[12], whichhasspeciﬁc
physical meanings. The three terms on the RHS of Eq. (6) denotethe charges in strong inversion, weak inversion, and moderateinversion regions, respectively. In the weak inversion region, theconcentration of electrons increases exponentially with the gatevoltage, while in the strong inversion region, the inversion chargesincrease linearly with the gate voltage. These properties are verysimilar to that of the bulk MOSFETs [11].The current–voltage characteristics followthe well-knownPao-Sah dual integral [13], and consist of both diffusion and drift
components
I
ds
¼
l
ð
2
p
R
Þ
C
ox
kT q
2
q
in
d
v
ch
d
y
ð
7
Þ
d
t
ch
is obtained by differentiating Eq. (6)
d
v
ch
¼
d
q
in
=
q
in
þ
d
q
in
þ
d
q
in
=
ð
q
in
þ
2
q
dep
Þ ð
8
Þ
Combining Eqs. (7) and (8) with current continuity principle,
I
ds
isexpressed explicitly in terms of
q
in
I
ds
¼
l
ð
2
p
R
Þ
L C
ox
kT q
2
f
ð
q
d
Þ
f
ð
q
s
Þ½ ð
9
Þ
where
q
s
and
q
d
are
q
in
calculated by (6) at source and drain termi-nals, respectively. The function
f
(
q
in
) is deﬁned as
Fig. 1.
Schematic cross-section of an N-channel SRG MOSFET showing the coordinate system and related variables.50
F. Liu et al./Solid-State Electronics 53 (2009) 49–53
f
ð
q
in
Þ ¼
12
q
2
in
2
q
in
þ
2
q
dep
ln
ð
q
in
þ
2
q
dep
Þ ð
10
Þ
In Eqs. (9) and (10), the current is explicitly expressed in terms of carrier charge density and is continuous and smooth from sub-threshold to strong inversion regions, thus it is suitable for circuitsimulation. The current expression is formally identical with thesolution of drain current for undoped SRG MOSFETs given in [12].
2.2. Trans-capacitances
In order to extend the model to calculate the capacitance–volt-age characteristics, an analytic and continuous expression of charges associated with each terminal is desired. Unlike the bulkMOSFET, which is a four-terminal device, SRG MOSFETs have onlythree terminals and therefore, only three terminal charges, i.e., (1)
Q
g
, (2)
Q
d
, and (3)
Q
s
, associated with gate, drain, and source,respectively, are required for circuit simulation. The gate chargecan be computed by integrating the carrier charge density alongthe channel. For the drain and source charges, we adopt Ward-Dutton’s linear-charge-partition method [14], which proves to bephysically sound and is widely accepted for bulk MOSFETs
Q
g
¼ ð
2
p
R
Þ
C
ox
kT q
Z
L
0
q
in
d
y
ð
11a
Þ
Q
d
¼ ð
2
p
R
Þ
C
ox
kT q
Z
L
0
yLq
in
d
y
ð
11b
Þ
Q
s
¼
Q
g
Q
d
ð
11c
Þ
In the deﬁnitions above, the charge conservation law is preserved.According to current continuity Eq. (7), d
y
¼
l
ð
2
p
R
Þ
C
ox
ð
kT
=
q
Þ
2
q
in
d
v
ch
=
I
ds
;
y
=
L
is equal to
½
f
ð
q
in
Þ
f
ð
q
s
Þ
=
½
f
ð
q
d
Þ
f
ð
q
s
Þ
based on thefact that the drain current is equal at any point
y
in the channel.Substituting d
y
,
y
and d
t
ch
(Eq. (8)) into (10), the integrals can be
carried out
Q
g
¼ ð
2
p
R
Þ
C
ox
kT q
L g
ð
q
d
Þ
g
ð
q
s
Þ
f
ð
q
d
Þ
f
ð
q
s
Þ ð
12a
Þ
Q
d
¼ ð
2
p
R
Þ
C
ox
kT q
L f
ð
q
s
Þ½
g
ð
q
d
Þ
g
ð
q
s
Þ þ ½
w
ð
q
d
Þ
w
ð
q
s
Þ½
f
ð
q
d
Þ
f
ð
q
s
Þ
2
ð
12b
Þ
Q
s
¼ ð
2
p
R
Þ
C
ox
kT q
L f
ð
q
d
Þ½
g
ð
q
s
Þ
g
ð
q
d
Þ þ ½
w
ð
q
s
Þ
w
ð
q
d
Þ½
f
ð
q
s
Þ
f
ð
q
d
Þ
2
ð
12c
Þ
where functions
g
(
q
in
),
w
(
q
in
) are deﬁned as follows:
g
ð
q
in
Þ ¼
13
q
3
in
þ
q
2
in
2
q
dep
q
in
þ
4
q
2
dep
ln
ð
q
in
þ
2
q
dep
Þ
w
ð
q
in
Þ ¼
1180
q
in
ð
240
q
3
dep
þ
60
q
2
dep
q
in
20
q
dep
q
in
ð
9
þ
q
in
Þ
þ
3
q
2
in
ð
80
þ
45
q
in
þ
6
q
2
in
ÞÞ þ
13
q
dep
ð
8
q
3
dep
þ
12
q
dep
q
in
2
q
2
in
ð
3
þ
q
in
ÞÞ
ln
ð
2
q
dep
þ
q
in
Þ
4
q
3
dep
ln
2
ð
2
q
dep
þ
q
in
Þ
i
The capacitances can be derived from the three terminal chargesdirectly. An SRG MOSFET needs nine nonreciprocal capacitancesfor small-signal simulation as opposed to 16 capacitances requiredforbulkMOSFET[15].Thenonreciprocalcapacitancesaredeﬁnedina matrix
C
ij
¼
o
Q
i
o
V
j
;
i
¼
j
o
Q
i
o
V
j
;
i
–
j
8<:
¼
C
ss
C
sd
C
sg
C
ds
C
dd
C
dg
C
gs
C
gd
C
gg
0B@1CA
ð
13
Þ
where
i
and
j
stand for
g
,
s
, and
d
. According to the charge conser-vation law, the following relationship between capacitances canbe derived:
C
gg
¼
C
gs
þ
C
gd
¼
C
sg
þ
C
dg
C
ss
¼
C
sd
þ
C
sg
¼
C
ds
þ
C
gs
C
dd
¼
C
ds
þ
C
dg
¼
C
sd
þ
C
gd
ð
14
Þ
This relation leaves only four capacitances independent of eachother, namely: (1)
C
gd
, (2)
C
dd
, (3)
C
dg
, and (4)
C
gg
. Using the chainrule, they are expressed in terms of the intermediate variable
q
in
at source (
q
s
) and drain (
q
d
)
C
gs
¼
o
Q
g
o
V
s
¼
o
Q
g
o
q
d
o
q
d
o
V
s
o
Q
g
o
q
s
o
q
s
o
V
s
¼
o
Q
g
o
q
s
o
q
s
o
V
s
C
gd
¼
o
Q
g
o
V
d
¼
o
Q
g
o
q
d
o
q
d
o
V
d
o
Q
g
o
q
s
o
q
s
o
V
d
¼
o
Q
g
o
q
d
o
q
d
o
V
d
C
dg
¼
o
Q
d
o
V
g
¼
o
Q
d
o
q
d
o
q
d
o
V
g
o
Q
d
o
q
s
o
q
s
o
V
g
C
sd
¼
o
Q
s
o
V
d
¼
o
Q
s
o
q
d
o
q
d
o
V
d
o
Q
s
o
q
s
o
q
s
o
V
d
¼
o
Q
s
o
q
d
o
q
d
o
V
d
ð
15
Þ
It should be noted that
o
q
d
o
V
s
¼
o
q
s
o
V
d
¼
0 because the voltage applied tosource has no control over the charge at drain, and vice versa. Asthe explicit form of
V
and
Q
has already been expressed in Eqs.(6) and(12)intermsof
q
in
, bydifferentiatingthemandsubstitutinginto Eqs. (15) and (14), all capacitances can be calculated.
3. Results and discussion
Based on the model presented above, current–voltage andcapacitance–voltagecharacteristicsofSRGMOSFETinalloperationregions are calculated. In order to verify our analytical model, theSynopsys TCAD sentaurus device simulator [16] is used for com-parison.Aconstanteffectivemobilityof400cm
2
/Vshasbeenusedfor both the numerical simulation and the analytical calculations.The default simulated device has a channel length of 1
l
m and agate oxide thickness of 2nm.Fig. 2a shows the model-predicted and numerically simulated
I
ds
versus
V
gs
curves with different geometric parameters, and theoutputcharacteristicsareillustratedinFig. 2b. Inordertoexaminethegeneralityof themodel, awiderangeof siliconradii from5nmto 30nm is used. As shown in the ﬁgure, the model calculationagrees well with the numerical simulation over a wide range of
R
. The result also shows the model predicted ideal sub-thresholdslope of 60mV/dec [15], which agrees with the theory.Inordertoverifyourmodelwithdifferentdopingconcentrationconditions, the drain current–gate voltage characteristics and theoutput characteristics are plotted again in Fig. 3a and b, but thebody doping concentration has been changed to a moderate level10
17
cm
3
. Again the model calculation agrees well with thenumerical simulation in both ﬁgures. For the curve of
R
=5nm,somedifferencebetweenthemodel predictionandnumerical sim-ulation is observed in the moderate inversion region. The factorthat contributes to this difference is from our approximation inEq. (4): the total ﬁxed charge is insufﬁcient to counteract chargesat gate and the mobile charge is no longer negligible. But in thatsmalldevicethequantumeffecthasbecomesigniﬁcantandtheer-rorisnotseriousafterweincorporatetheadvancedphysicaleffect.Fig. 4 illustrates the gate trans-capacitances versus gate voltagecharacteristics obtained from our model (curves), compared withthe 3D numerical simulation (symbols). The ﬁgure shows thatthe model prediction and the 3D numerical simulation match wellin most regions. Both the model prediction and the simulation re-sultsshowthatthegatetrans-capacitancessatisfythetrans-capac-itancerelationshipinalloperationregionsdictatedbyEq. (14)that
C
gg
=
C
gs
+
C
gd
.
Another interesting result is that
C
gs
and
C
gd
areapproaching3/5and2/5of
C
gg
,respectively,inthestronginversionregion in SRG MOSFETs compared to their corresponding value of 2/3 and 1/3 in bulk MOSFETs [15].
F. Liu et al./Solid-State Electronics 53 (2009) 49–53
51
Source terminal trans-capacitances versus gate voltage ob-tained from our model (curves) and 3D numerical simulation(symbols) are shown in Fig. 5. Also, a good agreement is obtained.It is known that the electrostatic feedback causes
C
ds
and
C
sd
to benegative, whichiscorrectlypredictedfromthepresentedmodel asshown in this ﬁgure. We should note that in the moderate inver-sion region, a small error between our model and the numericalsimulationcanbeobservedinbothFigs.4and5.Itisduetothedif-ﬁculty to accurately perform the charge partition in this region,which is well known in MOSFET models.Generally the trans-capacitances are not only functions of
V
gs
but also
V
ds
.
Figs. 6 and 7 show the drain and source relatedtrans-capacitances versus
V
ds
obtained from our model (curves)and 3D numerical simulation (symbols). Again, it is observedthat the model prediction matches the numerical simulationvery well. The non-reciprocity of trans-capacitances is clearlyshown in the two ﬁgures. It is obvious that
C
gd
=
C
dg
,
C
gs
=
C
sg
,and
C
sd
=
C
ds
when there is no voltage difference between thesource and drain. In this case, the device is symmetric perpen-dicular to the middle of the channel. When the SRG MOSFETreaches the saturation region, both the model and 3D numericalsimulation give
C
gd
=
C
dd
=
C
sd
.
Since communication from thedrain to the rest of the device is cut off owing to pinchoff (neglecting channel length modulation), all charges remain con-stant and are not affected by the variation of
V
ds
[15]. An exactexpression of the trans-capacitances at
V
ds
=0 should also beprovided where the capacitance expressions take the form of 0/0. From L’Hospital’s rule, a clear expression of the trans-capac-itances is written as
C
gg
¼
2
C
gs
¼
2
C
sg
¼
2
C
dg
¼
2
C
gd
¼
3
C
ss
¼
3
C
dd
¼
6
C
ds
¼
6
C
sd
ð
16
Þ
Finally we would like to point out that as our model aims atheavily-doped devices, usually the model is valid when the dopingconcentration
N
a
islargerthan(orequalto)10
17
cm
3
. Thisdopinglevel is also adopted in paper [8], which presents a model forhighly doped double-gate SOI MOSFETs. Also it should be notedthat as our model is based on fully-depletion approximation, themodel is limited by a maximum radius of the device (e.g. 50nmfor doping level at 10
18
cm
3
). This is not shown in Fig. 2 and 3
0.0 0.5 1.0 1.5 2.00.03.0x10
-5
6.0x10
-5
9.0x10
-5
1.2x10
-4
10
-16
10
-14
10
-12
10
-10
10
-8
10
-6
10
-4
I
d s
[ m A ] I
d s
[ m A ] I
d s
[ m A ]
V
gs
[V]V
gs
[V]
Symbols: 3D simulationCurves: Model predictionL=1
mt
ox
=2nmN
a
=10
17
cm
-3
V
ds
=1VR=5nmR=10nmR=20nmR=30nm0.0 0.5 1.0 1.5 2.00.03.0x10
-5
6.0x10
-5
9.0x10
-5
1.2x10
-4
1.5x10
-4
Model prediction
V
gs
=0.8VV
gs
=1.1VV
gs
=1.4VV
gs
=1.7VV
gs
=2.0VN
a
=10
17
cm
-3
L=1
mR=30nmt
ox
=2nm3D simulation
ab
Fig. 3.
(a) Drain current versus gate voltage obtained from our model (curves),compared with 3D simulation (symbols) for different geometric parameters inlinear and logarithm scale. The doping concentration is 10
17
cm
3
. (b) Outputcharacteristics predicted by our model (curves), compared with 3D simulation(symbols) for different gate voltages. The doping concentration is 10
17
cm
3
.
0.4 0.8 1.2 1.6 2.00.02.0x10
-16
4.0x10
-16
6.0x10
-16
8.0x10
-16
1.0x10
-15
Model predictionL=1
mR=10nmt
ox
=2nmN
a
=10
18
cm
-3
V
ds
=2V
G a t e t r a n s - c a p a c i t a n c e [ F ]
V
gs
[V]
2D simulationC
gg
C
gs
C
sg
C
dg
C
gd
Fig. 4.
Gate trans-capacitance versus gate voltage obtained from our model(curves) with 3D simulation (symbols).
0.0 0.5 1.0 1.5 2.00.02.0x10
-5
4.0x10
-5
6.0x10
-5
8.0x10
-5
1.0x10
-4
1.2x10
-4
10
-15
10
-13
10
-11
10
-9
10
-7
10
-5
V
gs
[V]
Symbols: 3D simulationCurves: Model prediction
R=5nmR=10nmR=20nmR=30nm
L=1
mt
ox
=2nmN
a
=10
18
cm
-3
V
ds
=1V
I
d s
[ m A ]
I
d s
[ m A ] I
d s
[ m A ]
0.0 0.5 1.0 1.5 2.00.01.0x10
-5
2.0x10
-5
3.0x10
-5
4.0x10
-5
5.0x10
-5
Model predictionV
gs
=1.4VV
gs
=1.1VV
gs
=0.8VV
gs
=1.7VV
gs
=2.0V
V
ds
[V]
N
a
=10
18
cm
-3
L=1
mR=10nmt
ox
=2nm
3D simulation
ab
Fig. 2.
(a) Drain current versus gate voltage obtained from our model (curves),compared with 3D simulation (symbols) for different geometric parameters inlinear and logarithm scale. The doping concentration is 10
18
cm
3
. (b) Outputcharacteristics predicted by our model (curves), compared with 3D simulation(symbols) for different gate voltages. The doping concentration is 10
18
cm
3
.52
F. Liu et al./Solid-State Electronics 53 (2009) 49–53

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