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A new design approach for monolithic transimpedance receivers based on root-locus techniques

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A new design approach for monolithic transimpedance receivers based on root-locus techniques
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  forms with a view to reducing the computation time, then the Burg and geometric-lattice methods should be chosen. The results obtained here are consistent with the ones reported earlier [6, 71 and referred to in the section on AR modeling. REFERENCES 1. J. Chen, C. Wu, K. Wu, and J. Litva, “Combining an Autoregres- sive Model with the FD-TD Algorithm for Improved Computa- tional Efficiency,” IEEE MTT-S Digest, 1993, pp. 749-752. 2. J. Litva, C. Wu, K. Wu, and J. Chen, “Some Considerations for Using the Finite Difference Time Domain Technique to Analyze Microwave Integrated Circuits,” IEEE Microwave Guided Waue Lett., Vol MGW-3, Dec. 1993, pp. 438-440. 3. V. Jandhyala, E. Michielssen, and R. Mittra, “FDTD Signal Extrapolation Using the Forward-Backward Autoregressive (AR) Model,” IEEE Microwave Guided Wave Lett., to be published. 4. Y. Hua and T. K. Sarkar, “Generalized Pencil-of-Function Method for Extracting Poles of an EM System from its Transient Response,” IEEE Trans. Antennas Propagat., Vol. AP-37, Feb. 5 W. L. KO and R. Mittra, “A Combination of FD-TD and Prony’s Method for Analyzing Microwave Integrated Circuits,” IEEE Trans. Microwaue Theory Tech., Vol. M7T-39, Dec. 1991, pp. 6. S. M. Kay and S. L. Marple, “Spectrum Analysis-A Modern Perspective,” Proc. IEEE, Vol. 69, Nov. 1981, pp. 1380-1419. 7. S L. Marple, Digital Specfral Analysis, Prentice-Hall, Englewood Cliffs, NJ, 1987. 1989, pp. 229-234. 2176-2181. Received 5-18-94 Microwave and Optical Technology Letters, 7/15, 690-692 1994 John Wiley Sons, Inc. CCC 0895-2477/94 A NEW DESIGN APPROACH FOR MONOLITHIC TRANSIMPEDANCE TECHNIQUES RECEIVERS BASED ON ROOT-LOCUS Valter Cocco Piero Marietti and Alessandro Trifiletti Diparhmento di lngegneria Elettronica Unrversith degli Studi di Roma ”La Sapienza” via Eudossiana 18, 00184 Roma, Italy KEY TERMS Optical receiuers, transimpedance amplifiers, MMIC, root-locus tech- nique ABSTRACT In this article we present a new design method for monolithic trans- impedance receiuers that is based on a simple model of uoltage ampl er and on root-locus eualuation of closed-loop transimpedance transfer function. I994 John Wley Sons, Inc. 1. INTRODUCTION Direct detection receivers in optical links quite often use transimpedance amplifiers TZA) to achieve good gain-band- width product, dc coupling, and high dynamic range [11-[5]. Using this configuration and monolithic integration it is pos- sible to obtain optical receivers with bandwidth above 2 GHz, transimpedance gain between 60 and 70 dB fl and input noise current in the range of 4-8 PA/ m. requency range and small dimensions due to integration allow us to consider the circuit as operating with lumped elements and to use rf design techniques. Among them we think that root-locus RL) representation is suitable to give a complete description of gain-bandwidth constraints as a function of circuit parame- ters. This technique has been already used to investigate the frequency behavior of feedback amplifiers [6]-[8], but it has to be adapted to be useful for MMIC optical receivers. The aim of our work is to demonstrate that gain and bandwidth performances of TZA can be deduced from a limited set of parameters of the forward amplifier, depending on topology and technological processes; it is possible to steer technological and design choices by considering the effect of the variations of these parameters on root locus. In Section 2 we explain how to use the RL technique TZA optical receivers. In Section 3 we describe a new design approach using this technique, and in Section 4 n example is presented. Concluding remarks are presented in Section 5. 2. ROOT-LOCUS TECHNIQUE FOR OPTICAL RECEIVERS In Figure 1 a block diagram of a TZA for optical receivers is shown, with a photodiode, a voltage amplifier with shunt-shunt feedback made by resistor R,, nd a buffer stage to match a 504 load. To analyze the receiver by means of feedback theory, it is necessary to deduce load effect of source, buffer stage and feedback network on forward amplifier. The p-i-n photodiode is usually modeled by a parallel resistor capacitor, and the buffer stage, in this article is modeled by a capacitor. As a matter of fact, using as a buffer a MESFET in common-drain configuration, its input admittance is given by where Cgs and g are the input capacitance and transcon- ductance of the MESFET and rp is the parallel of its output resistances and load. The second member of Eq. (1) is the input admittance of a series RC where R = rp and C = Cgs/(l + gmrp). With typical values of MMIC MESFET model parameters we get R 40 R and C = Cg,/2, and then it is possible to approximate 1) ith I scg,/2. 2) Moving to the input and to the output of the amplifier the load effects of source, buffer and feedback network, and neglecting inverse transmission parameter, we obtain the scheme of Figure 2 where I is the photogenerated current. Using the set of qj parameters to describe the amplifier it is straightforward to obtain for the amplifier and the feedback network, respectively, where (5) 692 MICROWAVE AND OPTICAL TECHNOLOGY LETERS / Vol. 7, No. 15, October 20 1994  where Rr Figure 1 Block diagram of a TZA optical receiver Ic r--. + Figure 2 Model of the voltage gain stage of the TZA including loading effects are the Y parameters of the forward amplifier with loading effects. Let The transimpedance transfer function of the overall amplifier becomes W s) = -R,F s)/ l + F(s)). Choosing the follow- ing model for the forward amplifier: (7) Y,, s> = 0, We can rewrite Eq. (5) as T(s) = G, + sC,, Yo s) = Go + sC y = 0. By substitution of Eqs. (8) in Eq. (6) we obtain Gl Go CO p. = - ' c, Po = 2 10) We see that by changing the feedback resistor R,, which is proportional to feedback gain, the position of the poles pi and po changes and makes useless usual root-locus tech- niques. We developed a software tool able to find root locus defined by the equation K + D(s) = 0 to obtain information that can drive the design process. 3. DESIGN GUIDELINES AND SOFlWARE The design procedure that we propose consists of the follow- ing steps Derive the small-signal models of photodiode, forward gain block, and buffer. This step is quite critical be- cause we have to use a simple model to fit the response of a multistage amplifier. We have also verified that in many situations the model represented by Eqs. (7) is accurate enough up to 10-GHz. Choose the range of value of feedback resistor to be used to evaluate the root locus. This choice is driven by the desired gain value. Compute and present the root locus. This step can be easily worked out by means of a software tool, which uses Cardano rule to find the poles. Examine the root locus with respect to the frequency- response characteristics of the receiver. The locus is plotted on polar coordinates to obtain information about the modulus and phase of the roots. Under dominant pole conditions, as is usually verified, the bandwidth of the receiver can be obtained by the modulus of the roots, and the peaking from the phase of the roots, as follows: where w, is the frequency of the dominant poles; w,, = ondm s the frequency where IW jw)l has its maximum and 4 is the angle between the axis jw = 0 and the line starting in the srcin and passing through the pole. We consider a good compro- mise between the requirements of increasing band- width and of keeping a good shaping of impulse re- sponse to choose values of peaking in the range 0.1- 1 dB. These are obtained when 4 is in the range between 50 and 60 . When the hypothesis of dominant poles fails Eq. 11) has to be modified as follows: where R is ratio between second and first pole moduli. MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 7, No. 15, October 20 1994 693  5. Trim the amplifier parameters. If no values of feedback resistor can match the design goals, then to find a solution it is possible to change the parameter set of the forward amplifier. This operation is useful in order to characterize the parameters that can improve perfor- mance of the receiver and that can be changed in a simple way. The operation ends requiring a new extrac- tion of parameter set Step 1 . 6. Check finally the result with a circuit simulator. At the end of Step 4 when a set of parameters is found that shows a good performance, we check the result on a standard simulator. 4. A CASE STUDY We have checked this design method on topologies using as active devices MESFETs from the Daimler-Benz E05 GaAs process. This process is characterized by fT = 25 GHz, f,,, = 45 GHz, and makes available 0.5-pm gate-length devices with gate width in a range from 200-1000 pm. The example we present is a receiver made by a voltage gain block in a cascode configuration, followed by a buffer stage. In Figure 3 the cascode stage loaded by a 5004 resistor is shown. The parameter set of the amplifymg net- work has been optimized to fit the electrical behavior of the forward amplifier. The result of optimization is shown in Figure 4. To show the accuracy of fitting we present in Figures 5 and 6 the location of the parameters of the full network CASC) and its model MDCASC). We chose a feedback resistor in the range between 1000 R and 3000 R with a 2004 step. The parameters of the model are used as input of our software, which worked out the root locus shown in Figure 7. We obtained a couple of complex conjugate poles, and the third is outside the plot because its frequency is above 10 GHz. The bandwidth of the receiver can be estimated by the modulus of the lower- frequency pole. As explained in Step 5 of Section 3 now we can change each parameter of the model to find which improves receiver performances. In Table 1 we present all changes we made, vdd T Fet 231 A OOA _I - et231 A + Qg I + VO 4 Figure 3 The cascode stage that we have used to verify our design technique I I 4 Figure 4 Electrical model of the cascode stage EEsof - Libra - Wed Par 3 W: 30: 58 1933 - w_lndJl Figure 5 Comparison between Y parameters of the voltage gain stage and its model EEsof - Libra - Wed Mar 3 W: 3l: O 1993 - w jwJg1 0 MAGrYElI + WAGrY2 WDCASC CASC 0.100 0.050 0. 000 b. 100 1. ow FFIEOGHZ 100. 0 Figure 6 Comparison between Y parameters of the voltage gain stage and its model \ \ \ \ \ \ \ ,. . . ' 500 \ so.\ \ .. . \ . \ , ' \ . \ .... Q R=3M10 \\ .... F<O>=16.1 5.0 3 0 1.0 Gh= Figure 7 Root locus of the cascode stage one parameter at time, and in Figures 8-13 subsequent changes in root locus. It is possible to increase bandwidth and to reduce peaking of receiver changing C,, C,, and pf, which depend on Cg,, Cgd and on the coupling Rds-Cps f the MESFET, but these 694 MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 7, No. 15, October 20 1994  TABLE 1. List of the Changes Made, with the Number of Figure, that Shows the Effects on the Root Locus Figure Parameter Initial value 0) Final value ( B) 8 G1 0 mS 1 mS 9 Cl 0 28 pF 0.1 pF 10 G2 2 2 mS 3 mS 11 c2 0.045 pF 0 02 pF 12 70 41 mS 60 mS 2 2 x 10-11 s 1 5 x 10-11 s-1 13 Pf ..r \ . \\ .' \ \ \>..-- ,\\ . \\ : U b I b I t 0 R=3000 F<0>=4,0 0 R=lOM F<0>=6.4 1 0 ReCrl \ \ SOo \ 600\\ \ \ \ \ ,. .. .. . \ .. \ .' \ . - \ _ .... .... IntrlA \ \ ,, _. .' .-- SO* \ 60*\\ \ ' .. .' \ \ .. \ . \ . \ ....-- ...' R=3000 .>\ \\ :: ?, F<O>=lC. . \ >,W \=* ' \ .'. ..\\ v ....-- ' , C.. 0 R=lM)O F<O>=l2.8 \ -\ . \ ,,... .-- ..r \ . \\ _' \ \ \>..-- .\\ . v. . \\ I ? b I 1 5.0 3.0 1 0 \ \ SOo \ 600\\ \ \ \ .' \ ,. .. .. . \ \ .. ohz 5.0 3 0 1 0 tSl \- ..\ ..r \ I 5.0 3.0 Figure 8 Root-locus change due to a variation of G, 3 \ \ 500 \ 60*\\ \ \ .cp . .' ' \ 3 0 \ .. \ , . . \ 0 R=3000 \ \ ..... F<O>=S6. .,.'\ \\ .... .' \ ..'.\ .: 5 \. . \ \* . .. ' '\ 0 R=1000 F<0>=12. 5.0 3.0 1.0 Gh= Figure 9 Root-locus change due to a variation of C, 0 R=3MKI F<O>=lP. (1 R=1000 F<O>=lO. ,.. .-t 5.0 3.0 1 0 Figure 10 Root-locus change due to a variation of G 5.0 3.0 1 0 Qhz Figure 11 Root-locus change due to a variation of C 0 R=3000 F<0>=23.6 0 R=lOOO F<0>=18.7 1 0 .0 3 0 Figure 12 Root-locus change due to a variation of pr parameters are almost fixed in a specific MMIC process. We can easily change the output conductance of the cascode stage and set it to G = 2.8 mS. In Figure 14 is shown the root locus of the receiver after changing the load resistor to 357 0 and for the feedback resistor in the range 1200-1600 a n Table 2 we present the final performance of the TZA in terms of the natural fre- quency of the poles, their phase, and the low frequency gain of receiver. In Table 3 a comparison between simulation of full circuit and root-locus technique designs is shown. MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 7, No. 15, October 20 1994 695    5.0 3 0 Figure 14 Root locus of the modified cascode stage TABLE 2. Final Performance in Terms of Natural Frequency of the Poles, their Phase and Low Frequency Gain of the Direct Path of the Stage TABLE 3. Comparison between Transimpedance Performance Deduced from our Design Techniques and the Simulation of the Full Network R.L. Full Network T O) dBl 62.2 T on dBl 61.2 Peaking [dB] 0.6 62.2 61.4 0.8 The final circuit parameter optimization shows an increase of bandwidth of 1 GHz, with the same value of peaking, and an excellent agreement still holds between RL tool results and circuit simulation. We have tested this design approach on several configura- tions of forward amplifier as single common-source stage, cascode stage with inductive peaking, and cascode with dif- ferent MESFET gate widths, always finding an excellent agreement between the results of the RL tool and the circuit simulation except for the single common-source stage. This was due to high reverse gain of this stage which makes it impossible to fit the forward amplifier stage with the unilat- eral model described by Eqs. 7). We have overcome this problem using an improved model for forward amplifier. CONCLUSION We presented a new design method for transimpedance am- plifier that can be used to understand how process character- istics and topology can influence performances of TZA through the use of a simple model. This model sums up the behavior of the circuit making possible to concentrate on a few parameters. In this article we have checked this approach on a particular case and we have found excellent results both in terms of agreement between circuit simulator and our tool and in terms of improvement of circuit performances. ACKNOWLEDGMENTS This paper was carried out in the framework of a cooperation between the “Dipartimento di Ingegneria Elettronica” of the Univer- sity of Rome “LA Sapienza” and the ESA-ESTEC research center of Noordwijk. We thank very much Dr. G. Gatti for his material and intellectual support. REFERENCES 1. M. Makiuchi, H. Hamaguchi, T. Kumai, and 0. Wada, “GaAs Optoelectronic Integrated Receiver Array Exhibiting High-speed Response and Little Crosstalk,” ZEE Electron. Lett., Vol. 22, No. 17, Aug. 1986, pp. 893-894. 2. Y. Archambault, D. Pavlidis, and J. P. Guet, “GaAs Monolithic Integrated Optical Preamplifier,” ZEEE J Lightwave Technol., Vol. LT-5, No. 3, March 1987, pp. 355-367. 3. N. Uchida, Y. Akahori, M. Ikeda, A. Kohzen, J. Yoshida, T. Kokubun, and K. Suto, “A 622 Mb/s High-Sensitivity Monolithic InGaAs-InP pin-FET Receiver OEIC Employing a Cascode Preamplifier,” ZEEE Photon. Technol. Lett., Vol. PTL-3, No. 6, June 1991, pp. 540-542. 4. D. C. W. Lo, Y. K. Chung, and S. R. Forrest, “A Monolithically Integrated In,,,,Gao,,,As Optical Receiver with Voltage-Tunable Transimpedance,” ZEEE Photon. Technol. Lett., Vol. PTL-3, No. 8, 5. A. A. Ketterson, M. Tong, J.-W. Seo, K. Nummila, J. J. Morikuni, S.-M. Kang, and Ilesanmi Adesida, “A High-Performance Al- GaAs/InGaAs/GaAs Pseudomorphic MODFET-Based Mono- lithic Optoelectronic Receiver,” ZEEE Photon. Technol. Lett., Vol. PTL-4, No. 1, Jan. 1992, pp. 73-76. 6. M. S. Ghausi and D. 0. Pederson, “A New Design Approach for Feedback Amplifiers,” IRE Trans. Circuit Theory, Vol. PGCT-8, No. 3, Sept. 1961, pp. 274-284. 7. M. S. Ghausi, “Optimum Design of the Shunt-Series Feedback Pair with a Maximally Flat Magnitude Response,” IRE Trans. Circuit Theory, Vol. PGCT-8, No. 4, Dec. 1961, pp. 448-453. 8. E. J. Angelo, Jr., Electronic Circuits 2nd ed.), McGraw-Hill, New York, 1964, pp. 597-624. Aug. 1991, pp. 757-760. Received 5-18-94 Microwave and Optical Technology Letters, 7/15, 692-696 1994 John Wiley Sons, Inc. CCC 0895-2477/94 NUMERICAL ANALYSIS OF RECTANGULAR WAVEGUIDE COUPLERS USING A 2D / FDTD ALGORITHM MULTIPLE-SLOT NARROW-WALL Enrique A. Navarro Communications Research Laboratory McMaster University Hamilton, Ontario, Canada, L8S 4K1* KEY TERMS Finite-difference-time-domain method, waveguide discontinuities, couplers ABSTRACT Slot narrow-wall couplers are simple but effective directional couplers. A simple and ejjicient approach to analyze these devices using the FDTD algorithm is presented. The technique uses a synthetic excitation and a * Permanent address: Department of Applied Physics, Universitat de ValBncia, Doctor Moliner 50, 46100 Burjassot (Valsncia), Spain. 696 MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 7, No. 15, October 20 1994
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