A robust commutation circuit for reliable single-step commutation of the matrix converter

A robust commutation circuit for reliable single-step commutation of the matrix converter
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  A Robust Commutation Circuit for Reliable Single-Step Commutation of the Matrix Converter S.A. Nabavi Niaki and R. Iravani   Department of ECE, University of Toronto Toronto, ON, M5S 3G4, CANADA   H. Kojori   Honeywell Advanced Technology Mississauga, ON L5L 3S6, Canada  Abstract   —The matrix converter (MC) is an attractive topology for the more electric aircraft because of its high-power density and bidirectional power flow features. One of the challenging issues in MC is the current commutation. The commutation process in a matrix converter (MC) is more complex as compared with that of the traditional AC-DC-AC converter due to the lack of natural free-wheeling paths. Multi-step commutation methods along with various voltage clamp circuits, connected at input and output, have been proposed for the MC. These methods are complex and require accurate real-time information about direction of current and input AC system voltages. Reducing the commutation time and process is a main objective of using MC in aerospace applications where the range of frequency is between 360-800 Hz. This paper presents a robust commutation circuit for reliable single-step commutation of the MC, and demonstrates its feasibility through computer simulations and experimental results obtained from a laboratory scale prototype. I.   I  NTRODUCTION The matrix converter (MC) has attracted significant attentions [1]–[8] due to its features that enable (i) adjustable  power factor, (ii) bi-directional power flow, (iii) high-quality waveforms, and (iv) compact design due to the lack of energy storage components. Various multi-step commutation strategies for the MC have been proposed [8], [10] and compared in the technical literature [11],[12]. Among these methods, the 4-step commutation is the most widely accepted one. The main technical issues of the multi-step methods are as follows. (i) The sequence of switch turn on-off is determined by the direction of output current and/or the values of the input-side voltages. The commutating reliability depends on accurate evaluation of the voltage difference of the two involved input  phases and the output-side current direction. When the output-side current or the difference of the input voltages is small, the commutation is prone to failure. (ii) Reducing the commutation time enhances the quality of the input and output waveforms [13]. The commutation time can be reduced by reduction of the number of steps from four to two [14] or one [15]. This, hence, increases the commutation algorithm complexity. For the aerospace applications where the range of input-side frequency is between 360-800 Hz, reducing the commutation time is one of the main objectives. This paper introduces a novel single-step commutation circuit for the MC that provides a safe and reliable bidirectional path for the load current during the commutation period and protects the switches against any overvoltage due to the load current interruptions under steady state or fault conditions. This commutation circuit is directly connected across each switch module and does not require an additional clamp circuit. The main advantage of the proposed commutation circuit is that it introduces only a fairly short deadtime delay (in the range of nanoseconds). This single-step delay considerably minimizes the commutation time compared to multi-step commutation methods. The proposed method does not require line current and/or phase voltage measurements. II.   MULTI-STEP   COMMUTATION   PROCESS During the past decades, three kinds of multi-step commutation strategies have been proposed, i.e., 1) current- based commutation (CBC), 2) voltage-based commutation (VBC), and 3) hybrid commutation (HC). The multi-step commutation algorithms require line current and/or phase voltage measurements. CBC and VBC strategies rely on the knowledge of the output-current direction and the relative magnitude of input voltages respectively. However, the directions of output current and the relative magnitudes of the input voltages are difficult to measure, particularly at zero or close to zero crossing instants. The misjudgment of output-current direction in the commutation process leads to an open circuit of the load current and causes overvoltage. If the relative magnitude of the input voltages is misjudged, a short circuit of the input phases can happen. HC strategies rely on information about the relative magnitude of input voltages and the output-current direction. Fig. 1 depicts the 4-step sequence of current commutation from the bidirectional switch S  a  (AC switch module) to the  bidirectional switch S  b , when the load current is positive 978-1-4799-2325-0/14/$31.00 ©2014 IEEE 3349  (  I   L >0), e.g., towards the load. This commutation strategy is  based on CBC and the commutation sequence is as follows:    t   < t  1 ; S  a 1  and S  a 2  are on    t   = t  1 ; S  a 2  turned-off , S  a 1  conducts (load current)    t   = t  2 ; S  b 1  turned-on , both S  a 1  and S  b 1  conduct    t   = t  3 ; S  a 1  turned-off , S  b 1  conducts    t   = t  4 ; S  b 2  turned-on to allow negative current conduction    t   > t  4 ; S  b 1  and S  b 2  both are on. The commutation time of 3 . 6 μ s is reported in [8] for safe commutation and the minimum reported commutation time is about 1  s [16]. III.   PRINCIPLES   OF   OPERATION   OF   THE   PROPOSED   COMMUTATION   CIRCUIT The basic components of the proposed commutation circuit, Fig.2, are 1) a diode bridge, 2) a capacitor, and 3) an energy mitigation circuit (EMC). The function of EMC is either to dissipate the stored energy in the capacitor through a resistive component or to return the stored energy back to the system [17]. To explain the concept, a two-phase to one-phase MC, Fig. 3, is adopted. The commutation circuit is connected across each main switch and provides a bidirectional path for the load current by introducing a turn-on delay during the commutation  process. The analysis also considers the effect of line (stray) inductance. The commutation process includes (i) opening the outgoing switch, (ii) transferring the load current to the commutation circuit, and (iii) closing the incoming switch after the turn-on delay, as follows.  A.    Pre-commutation (S  a  closed, S  b  open) Initially, the switch in phase a  ( S  a ) is closed and the load is supplied by v a , i.e.,  i  L = i a  and i b  = 0. The load voltage and the voltage across S  b  are dt di Lvv aaa L    , (1)   dt di Lvvvvv aaab LbSb ,  (2) Equation (2) is valid if the diode bridge in phase b  is  blocked by v Cb  > v ba , assuming the load current i a  during the short period is constant, i.e.,  di a / dt   = 0. Otherwise the bridge conducts and the voltage across S  b  is v Cb . To satisfy this condition, the commutation capacitor voltage should be more than the line-to-line voltage, i.e.,     |  |,   , ∙  (3)  B.    During-commutation (S  a  open, S  b  open and then closed) For this condition, the commutation process can be investigated in two stages: 1) the load current transfer from S  a  to the commutation circuit of phase a (turn-on delay), and 2) the load current transfer from the commutation circuit of phase a  to switch S  b  after closing S  b   (transition delay). 1)   Turn-on delay (S  a  open, S  b  open) Switch S  a  is turned off and S  b  is turned on. Since the turn-on delay strategy is adopted for the safe operation of switches, S  b  is turned on after time delay t  d  . Upon S  a  turn-off instant, the load current flows through the commutation circuit; i.e., i Ca  = i  L  = i a  and v a  continues to supply the load. The load current flows in the commutation capacitor ( C  a ) and charges the capacitor ,1 0   d  t aCaCa dt iC vv  (4) where v Ca 0  is the capacitor initial voltage. Since the diode  bridge across S  a  is open and conducts the load current, the capacitor voltage appears across S  a , i.e., S  a  1   S  a  2   S  b  1   S  b  2   t    ttt  Fig.1 The 4-step sequence of current commutation from bidirectional switch S a  to bidirectional switch S  b  when the load current is  positive ( I  L   > 0). S  a  1   S  a  2   S  b  2   v  a   v  b   I  L   S  a   S  b    S  b  1   C    S  M    EMC Fig.2  The proposed commutation circuit for MC and its basic components. i  L  v  L  + v  a  L  a  + S  a    i  a  L  b  C  b    + v  Cb    + S  b    i  b  v  b  C  a    + v  Ca    i  Ca  i  Cb    Commutation CircuitFig.3  A two-to-one switching configuration with the commutation circuit. 3350   CaSa vv  (5) The positive/negative sign in (5) depends on the positive or negative direction of the load current, respectively. In the following, we consider the positive current direction unless otherwise specified. The voltage across the load and S  b  are , Caaaa L vdt di Lvv    (6)  dt di Lvvvv aaCaabSb  (7) 2)   Transition delay: Transition from commutation circuit of phase a to switch S  b  (S  a  open, S  b  closed) After the turn-on delay ( t  d  ),  S  b  is closed. However, because of  L a  and  L b , the current cannot be instantaneously transferred from phase a to phase b . The capacitor in bridge- a  conducts until its current goes to zero. This transition interval depends on the line (stray) inductances  L a  and  L b . Under this condition  both v a  and v b  contribute to the load current, and  )(21 Cabbaaba L vdt di Ldt di Lvvv  (8) When the bridge of phase a  is conducting, the voltage across S  a  is V  ca . For a symmetrical system where  L a  =  L b , the rates of change of currents i a  and i b  are the same, but the current directions are different and thus the differential terms in (8) cancels out. 3)    Post-commutation (S  a  open, S  b  closed) In the post-commutation period, the load current is fully transferred to phase b  and the diode bridge in phase a  is  blocked by v Ca . The conditions for this period are 1) v Sb  = 0, 2) i b   = i  L , 3) i a  = 0, and the load voltage and the voltage across S  a  are , dt di Lvv bbb L    (9)  dt di Lvvv bbbaSa  (10) It should be noted that the actual delay in the proposed system is only t  d   and the next gating signal can be updated after t  d   which is in the range of hundred nanoseconds. Performance of the commutation circuit in the following sections is investigated based (1) to (10). IV.   COMMUTATION C IRCUIT P ERFORMANCE  The main feature of the commutation circuit is to provide an auxiliary path for the load current during the commutation  period when all the switches are open. During this period, the load current charges the commutation capacitor and the switch voltage is same as the capacitor voltage. Since the same gating signal is applied to both switches in the AC switch module (Fig.1), the number of gate drivers can be reduced to half as compared to the other multi-step approaches.  A.    Energy Mitigation Circuit (EMC) The performance of the commutation circuit highly depends on the duration of the turn-on delay ( t  d  ). During these  periods, the line current charges the commutation capacitor. The capacitor voltage is governed by (4). If there is no auxiliary path (circuit) to discharge the capacitor, the capacitor voltage increases based on (5) and (7). An energy mitigation circuit can be employed to regulate the commutation capacitor voltage. The average power rating of an EMC is less than 3  percent of the total average power rating of the unit, depending on the type of switching devices, duration of deadtime and turn-on/turn-off delay compensation for the switching device PWM gating-pattern. The energy stored in the capacitor can be either dissipated in a resistive component or returned to the system depending on turn-on delay ( t  d  ), the unit rating, and the cost justification. For low power applications, the collected energy during commutation can be dissipated in a resistor. However, for a larger unit, an energy recovery circuit can be employed to return the stored power  back to the system.  B.   Switch voltages and overvoltage protection The switch voltages are expressed by (2), (5), (7), and (10) for all operating intervals. Equation (7) provides the maximum switch voltage of v ba + v Ca  (line-to-line voltage plus the commutation capacitor voltage) when the differential term is ignored. However, (3) indicates the diode bridge is open and S  b  voltage is v Cb , and not v ab + v Ca . This is exploited as the overvoltage protection criteria for the switches. Therefore, by maintaining the capacitor voltage level above the natural commutation voltage, the maximum switch voltages can be determined. Fig.4 provides more insight into the MC overvoltage issues. An inductive load is selected as the worst case scenario. When S  a  is closed             , (11)   and when S  a  is open              ∙   (12)   In (11), the dominant voltage component across the load is V  a  while in the (12) is ( V  a - V  Ca ). Since V  ca  is greater than V  a  (condition of (3)), the load voltage is negative and the current decays to zero. Fig. 5 shows the voltage waveform based on time-domain simulation of the system of Fig. 4. At t  =0.076s, V  L  i  a L a + V  Ca V  a    S  a    V  Sa    0.1  1 mH115 Vrms 400 Hz Fig.4  Study system for the overvoltage analysis.   3351  oceocvr iisef  --- c pa v e F  “off” sate dmmutation, scept through ens the diod pacitor. Durinoltage given bThe energcovered by an a resistive co represented bergy during llowing contr    The capacitthe upper pr    When v C   beapplied to ttransferred t   When v C   besignal is acapacitor diabove the naFig.7 showrrent of phaarameters gived the threshol  _set_High  =650 .   Type-2.b Co Commutatioch AC swit     +   ig.8. a) Type-2.b cthree-phase-t (a)(b) ring the nor ince there is the commuta bridge and g commutatio (4), i.e. v C  0  is stored duri Energy Recomponent. For y S   A  and  R  icommutation l strategy is ar voltage ( v C  )set value of v omes greater e auxiliary s the ERC. comes equal  plied to the charge and totural commuts the comme a  for the n in the Apped voltages in . mmutation Ci n circuits Tyh module. T   n   module c buses     ommutation circu-one-phase ICM al operation. no path for ion capacitor,lows through , the capacitoequal to v C_set_  ng the comery Circuit (Ethe sake of si Fig.6.b. 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PERIMENTAL  posed concepd and tested. the correspo9.a and 9.b re -to-one-phase Ming & ntrol     Input Filter 3-to-1 phase MC. arged above e voltage) sacitors as ontation circuit switches. (ICMC) conf h main switcrent during coges are connene commutatiiguration. hase-to-one-pwn in load curreduring the cgy can be ado ERIFICATION ts, a 2-kW, 3 Details of ding experimspectively. Th  parameters. ICMC 3-1SF   20 the natural ggests the capacitor. (Integrated iguration, a to provide mmutation. cted to the n capacitor ase matrix . The main nts can be mmutation  pted for the -to-1-phase IMULINK ntal results e prototype Loadwitching requency   kHz 3353
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