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Corresponding author: R. Rizzo, Department of Electrical Engineering University of Naples Federico II, Via Claudio 21, 8012 Naples, Italy, E-mail: renato.rizzo@unina.it
1
University of Naples Federico II, Naples, Italy Copyright © JES 2012 on-line : http://journal/esrgroups.org/jes
Renato Rizzo
1,*
J. Electrical Systems 8-3 (2012): 348
-355
Short paper
Design of a high efficiency-low cost double level boost converter
In the paper is presented and analysed the design of a new Double Level Boost converter for application in residential smart micorgrids. The objective of the design is to obtain a new high efficiency-low cost DC/DC converter architecture capable of providing two voltage level outputs, both higher than input voltage converter, by reducing the number of switches and passive components in the power converter, maintaining the same functionalities.
Keywords: Microgrid; renewable energy sources; buck-boost converter; double level converter.
1. Introduction
One of the main focus in the exploration of innovative converters structure is to reduce costs and increase efficiency in the power electronics conversions. In general it is easy to understand that cost and efficiency are concepts strongly linked. For every kind of system losses have a cost: a reduction of losses share – that means a higher efficiency – of course implies a lower system running cost. In the power electronics converters, the most of losses are due to the power semiconductor devices. Moreover - due to their non-ideal characteristics - also passive components introduce a loss share. A possible way to increase the efficiency of the power electronics structures could be the reduction of the number of switches and passive components in the power converter, maintaining the same functionalities. In this way also a reduction in terms of total realization costs of system may be reached. According to this purposes, looking at the power electronics to be utilizied in distributed generation not at high or medium voltage [1,2] but within microgrids i.e. for residential application, the Double Boost represents a new converter architecture conceived with the aim to get a high efficiency – low cost structure. Once introduced the basic principles of the converter steady state analysis [3], the operating principle of this converter is widely discussed. The steady state analysis has the aim to investigate on the behavior of the converter where no transient phenomena are occurring, and to find the output voltage and inductor current waveform. The small-ripple approximation and the principles of inductor volt-second balance and capacitor charge balance represent the basic approach for the steady state analysis.
2. The Double Boost converter
This section deals with the design of a new DC/DC converter architecture capable of providing two voltage level outputs, both higher than input voltage. The architecture shown in Fig. 1 is derived, after analysing the largely used topologies [4-8] by coupling the functioning of two independent boost converter. This converter is made of one inductor and three switches. The step-up ratio and the voltage output amplitudes in steady state are connected to the ON-OFF times of the switches. A practical realization of this converter implies the use of fully controlled switches (i.e. IGBT or MOSFET) in order to guarantee the right
J. Electrical Systems
8-3 (2010):
348-355
349 commutation sequence of semiconductors devices. The double boost converter was thought in a broader prospective with the aim to make this structure the core of a integrated converter architecture for the distributed generation based on renewable sources [9]. Fig. 1. Double Boost converter architecture. 2.1 Steady State Analysis The duty cycle
D
is defined as the ratio between the ON state time of the switch
T
on
and the period
T
s
=1/
f
s
, where
f
s
is the switching frequency. It is possible to define a duty cycle for each switch of structure of Fig. 1:
sON sON sON
T swT DT swT DT swT D
33221
===
(1) where: 110;10;10
2121
=++>>>>>>
D D D D D D
Fig. 2 shows qualitatively the sequence of switch conduction in the Double Boost converter. Fig. 2. Conduction sequence in the Double Level Boost.
R. Rizzo:
Design of a high efficiency-low cost double level boost converter.
350 Let us apply the principles of inductor volt-second balance and capacitor charge balance to find the steady state output voltage and inductor current for this converter. Starting from the Fig. 1, it is possible to analyze each subinterval of the converter functioning.
Subinterval
[
D
1
T
S
] – When the switch
S
w1
is ON, the right-hand side of the inductor is connected to ground whereas the two capacitors
C
1
and
C
2
are disconnected from the source, resulting in the network of Fig. 3. Fig. 3. Double Boost converter architecture: subinterval [0,
D
1
T
S
]. The inductor voltage
v
L
(
t
)
and capacitor current
i
C1
(
t
) and
i
C2
(
t
) for this subinterval are given by:
222111
)(;)()(;)(
Rt vi Rt vt iV t v
C C g L
−=−==
(2) Where
V
g
is the constant DC voltage input. Introducing the small-ripple approximation:
2211
)(;)(
V t vV t v
==
(3) we obtain:
222111
;;
RV i RV iV v
C C g L
−=−==
(4)
Subinterval
[
D
2
T
S
] – When the switch
S
w2
conduces the inductor is connected to the top output whereas
C
2
is disconnected from the source, resulting in the network of Fig. 4. Fig. 4. Double Boost converter architecture: subinterval [
D
1
T
S,
D
2
T
S
]. The inductor voltage
v
L
(
t
)
and capacitor current
i
C1
(
t
) and
i
C2
(
t
) for this subinterval are given by:
J. Electrical Systems
8-3 (2010):
348-355
351
2221111
;;
RV i RV I iV V v
C LC g L
−=−=−=
(5) where the small-ripple approximation
i
L
(
t
)
=I
L
has been used.
Subinterval
[
D
3
T
S
] – When the switch
S
w3
conduces the inductor is connected to the bottom output, resulting in the network of figure 5. Fig. 5. Double Boost converter architecture: subinterval [
D
2
T
S,
D
3
T
S
]. The inductor voltage
v
L
(
t
)
and capacitor current
i
C1
(
t
) and
i
C2
(
t
) for this subinterval are given by:
2221112
;;
RV I i RV iV V v
LC C g L
−=−=−=
(6) The total volt-seconds applied to the inductor over one switching period can be inferred from the voltage waveform of Fig. 6. Fig. 6. Double Boost converter: Inductor voltage waveform. During the first subinterval,
v
L
(
t
)
is equal to DC input voltage
V
g
and positive Volt-seconds are applied to the inductor. Since in steady state, the total Volt-seconds applied on one switching period must be zero, an accumulative negative volt-seconds must be applied during the second and third subintervals. That means, considering also the symmetry of structure outputs, the inductor voltage during the subintervals
D
2
T
S,
and
D
3
T
S
– respectively
V
g
-V
1
and
V
g
-V
2
– must be negative. Hence,
V
1
and
V
2
are higher than
V
g
. By introducing the volts-second balance we obtain:

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