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Vol. 34, No. 5 Journal of Semiconductors May 2013
On-current modeling of short-channel double-gate (DG) MOSFETs with a verticalGaussian-like doping profile
Sarvesh Dubey
1
, Pramod Kumar Tiwari
2
, and S. Jit
1;
1
Department of Electronics Engineering, Indian Institute of Technology (BHU), Varanasi-221005, India
2
Department of Electronics and Communication Engineering, National Institute of Technology Rourkela-769008, India
Abstract:
An analytic drain current model is presented for doped short-channel double-gate MOSFETs with aGaussian-like doping profile in the vertical direction of the channel. The present model is valid in linear and satura-tionregionsofdeviceoperation.Thedraincurrentvariationwithvariousdevice parametershasbeendemonstrated.The model is made more physical by incorporating the channel length modulation effect. Parameters like transcon-ductanceanddrainconductancethatareimportantinassessingtheanalogperformanceofthedevicehavealsobeenformulated. The model results are validated by numerical simulation results obtained by using the commerciallyavailable ATLAS
TM
, a two dimensional device simulator from SILVACO.
Key words:
drain current; DG MOSFET; transconductance; drain conductance
DOI:
10.1088/1674-4926/34/5/054001
EEACC:
2570
1. Introduction
The relentless advancements of electronics, informationtechnology (IT) and communications have been driven pri-marily by the exponential improvement in the CMOS tech-nology
Œ1
. As CMOS scaling is approaching the limit imposed by the severe presence of unavoidable short-channel effects(SCEs), an alternative structure of the conventional MOSFETis being sought. Double-gate (DG) MOSFETs are found to beamenable to scaling compared with the conventional MOS-FETs because of their capability to be scaled up to the veryshortest channel length possible for a given gate-oxide thick-ness
Œ2;3
. In addition to the inherent property of suppressingSCEs and steep subthreshold slope, DG MOSFETs offer highdrive current and transconductance attributed to the two chan-nel property of the symmetrical DG device. Thus modeling thedrain current of the DG MOSFET becomes requisite becauseit provides the fundamental skeleton for a circuit simulator andalso it is essential to get the physical insight
Œ4
.Drain current models have been developed for un-doped
Œ5
11
and doped short-channel DG MOSFETs
Œ13
18
.Suzuki
et al.
Œ5
proposed a lightly doped n
C
–p
C
DG SOIMOSFET having two threshold voltages related to n
C
and p
C
polysilicon for the back and front gates respectively. Consider-ing charge-sheet approximation, they
Œ5
derived a drain currentmodel in strong inversion and demonstrated high speed oper-ation of the device. The current model
Œ5
neglected the short-channel effects and regarded the device as long-channel evenfor 0.1
m gate length. Taur
et al.
Œ6
presented a continuousanalytic current model for undoped long-channel DG MOS-FETs. They
Œ6
derived the current–voltage (
I
–
V /
characteris-tics in all the regimes of device operation from closed-form so-lutions of the Poisson’s equation and current continuity equa-tionwithoutthecharge-sheetapproximation.Hariharan
et al.
Œ7
presented a drain current model for a short-channel symmetricDG MOSFET. The channel region was kept undoped/lightlydoped. The inversion-charge density was used for modelingthe drain current in a strong inversion region under the drift– diffusion transport mechanism. The variation of transconduc-tance and drain conductance has also been shown against gate-to-source and drain-to-source voltages respectively. Reyboz
et al.
Œ8
reported a continuous and compact current model of anundoped independent DG MOSFET. In addition, they
Œ8
alsoreported an empirical model for mobility degradation owing totransverseelectricfieldandavelocitysaturationmodelaswell.Their
Œ8
model was valid for long-channel as well as short-channeldevices.Atthegatelengthof30nm,agoodmatchwasobserved between numerical simulation results and model re-sultsofdraincurrent,transconductanceanddrainconductance.Mohammadi
et al.
Œ9
have presented a semi-analytical modelfor the
I
–
V
characteristics of nanoscale undoped symmetricDG MOSFETs. The model employed a parabolic potential ap- proximation for estimating the body potential normal to the in-terfaces in all the regions of device operation. The inversion-charge density approach in addition to the carrier confinement phenomenon was taken into account. Ioannidis
et al.
Œ10
gavean analytical model for the transconductance to current ratio
.g
m
/
I
D
/
of a nanoscale DG MOSFET with lightly doped chan-nel. The model incorporated the surface roughness scatteringand velocity saturation effects and was valid from weak in-version to saturation region of device operation. In terms of device parameters, there was good agreement between modelresults and numerical simulation results. Recently, Papathana-siou
et al.
Œ11
have presented an explicit charge-based unifiedcompact drain current model for lightly doped or undoped DGMOSFETs.Themodelhastakenintoaccounttheshort-channeleffects, the subthreshold slope degradation, the drain-induced barrier lowering and the channel length modulation effects inall regimes of device operation. The mobile charge density isdescribedbyaunifiedLambert
W
functionwhichisvalidfromweak to strong inversion. An average error of about 3% is re- portedbetweenthemodelresultsoftransferandoutputcharac-
† Corresponding author. Email: sjit.ece@itbhu.ac.inReceived 4 October 2012, revised manuscript received 14 November 2012 © 2013 Chinese Institute of Electronics
054001-1
J. Semicond. 2013, 34(5) Sarvesh Dubey
et al.
teristics with simulation results. The
g
m
/
I
D
ratio has also beenexamined from the modeled transfer characteristics in order togive an insight into the efficiency of the proposed structure.The models discussed so far are valid for undoped DG MOS-FETs. It should be noted that without using the body doping asa tool for adjusting the threshold voltage, undoped DG MOS-FETs need to rely on gate work function for achieving multi- plethresholdvoltagesonachip,whichimposesatechnologicalhurdle
Œ12
.Besidesthis,memorycellapplicationsinDGMOS-FETs require a doped body
Œ13
. From this viewpoint a number of authors have proposed a drain current model for doped DGMOSFETs
Œ13
18
.Kranti
et al.
Œ14
presentedananalyticaldraincurrent model for long-channel graded channel (GC) DG SOIMOSFETs. Their analysis was based on charge-sheet approx-imation. Based on their
Œ14
modeling, 2D simulation and ex- perimental results, they showed that DG MOSFETs with later-ally asymmetric channel engineering can achieve high valuesof saturation drain current. They also compared their resultsof GC DG MOSFETs with experimental and simulated dataof uniformly doped DG and single gate (SG) SOI MOSFETs.The analysis took into account the effect of length and dopingof the high and low doped regions to develop a compact modelsuitable for device design. Moldovan
et al.
Œ15
presented an an-alytical and continuous model for a highly doped long-channelDG SOI MOSFET. Valid from below to well above thresh-old, a unified charge control model was derived. The chan-nel current was expressed as an explicit function of the appliedvoltages targeting baseband analog circuits. However, the de- pendency of drain current on channel doping was not demon-strated. Cerderia
et al.
Œ16
derived a compact current model of symmetric short-channel DG MOSFETs. The channel dopingwas considered in the range of concentrations between 10
14
and 3
10
18
cm
3
. The mobile charge density was calculatedusing the difference of potentials at the surface and at the cen-ter of the Si doped channel. They
Œ16
performed the variationof the transfer and output characteristics as a function of chan-nel doping and other device parameters in linear and saturationregions. Choi
et al.
Œ17
presented a drain current model of fullydepleted (FD) short-channel symmetric DG MOSFETs withdoped silicon body. The model furnished a continuous simpleclosed-form expression of drain current in all operational re-gions. The parabolic approximation was used to estimate thechannel potential. The drain current modeling was divided intosubthreshold current and strong inversion current. In strong in-version, the drift current of doped DG MOSFETs was modeled by considering inversion-layer capacitance based on charge-sheet approximation. However, the model used a fitting para-meter(
)providingnearlyanalyticresults.Thechanneldopingconcentration was considered up to 1
10
19
cm
3
. The sur-face potential based continuous drain current model for dopedDG MOSFETs was reported by Jin
et al.
Œ13
. They
Œ13
consid-ered a wide range of doping concentration. The total currentmodel consisting of both drift and diffusion components wascomparedwithsimulationresultsandshowedverygoodagree-ment in subthreshold, linear and saturation regions at different body doping concentrations. An equivalent thickness concept based model depending on channel doping concentration of doped DG MOSFET was proposed by Sallese
et al.
Œ18
. Validfor relatively high doping, equivalent thickness is further usedto calculate the mobile charge density and drain current of the
Fig. 1. Schematic diagram of a DG MOSFET.
L
,
t
si
and
t
ox
are thechannel length, channel thickness and oxide thickness, respectively.
device for all operation regions. However, maintaining unifor-mity of dopants throughout the channel region is not an easytask because, during many of the fabrication stages like diffu-sion and threshold adjust implantation, the doping profile be-comes nonuniform in the practical MOS devices
Œ12
. Further,the ion implantation provides a Gaussian profile for the dopingdistribution in the doping region of any device
Œ12
. Therefore,a drain current model for Gaussian doped DG MOSFET es- pecially in linear and saturation regions of device operation isneeded.In the present work, for the first time, an analytical draincurrent model forshort-channel DGMOSFETswithGaussian-like doping profile in the vertical direction of the channel has been presented. The drain currents in linear and saturation re-gion are obtained by calculating the charge densities in thechannel region. The analysis has been extended to obtain theexpressions for transconductance and drain conductance. Itshould be noted that to make the model fully analytical in na-ture, the actual Gaussian function has been replaced by an ap- proximate Gaussian-like function
Œ19
. The present work may be seen as the continuation of our previous works
Œ12;20;21
onGaussian doped DG MOSFETs. A 2D device simulator, AT-LAS
TM
, has been used to validate the model results
Œ22
.
2. Model formulation
The schematic structure of the DG MOSFET used for thedraincurrentandsimulationisshowninFig.1where,thenota-tions
L
,
t
si
and
t
ox
are the channel length, silicon film thicknessandgateoxidethicknessofthedevice,respectively.The
x
-and
y
-axes of the 2D structure are taken along the source-channelinterface and center of the channel respectively, as shown inthe figure. The Gaussian-like doping profile
Œ19
, say
N
b
.x/
, isconsidered in the vertical direction of the channel:
N
b
.x/
D
N
p
c
h
.a
C
2b˛X/
2
2b
i
exp
a˛X
bX
2
;
(1)where
X
D
x
R
p
p
2
p
,
R
p
istheprojectedrange,
p
beingthestrag-gleoftheGaussianprofile;
N
p
isthepeakdopingconcentration054001-2
J. Semicond. 2013, 34(5) Sarvesh Dubey
et al.
at
x
D
R
p
;
a
,
b
and
c
are the fitting constants having values
a
D
1:786
,
b
D
0:646
and
c
D
0:56
;
˛
D C
1
for
x > 0
and
1
for
x < 0
, involved in the Gaussian-like function.
2.1.
I
–
V
formulation
In the above-threshold regime of device operation, thecurrent–voltage characteristics are mainly dominated by drift phenomenon. For gate-to-source voltages (
V
GS
/
larger thanthreshold voltage, DG MOSFETs operate in the linear or satu-ration region depending on drain bias (
V
DS
/
. First we will con-sider the formulation of drain current for the linear region andthen in the saturation region. For small
V
DS
, the drain currentin the linear region can be written as
Œ23
I
D
D
W
eff
.
Q
inv
/
d
V.y/
d
y ;
(2)where
W
isthechannelwidth,
V.y/
representsthequasi-Fermi potential along the channel,
Q
inv
is the inversion charge,
eff
is the field dependent mobility defined as
Œ14
eff
D
n0
1
C
.
0
=2v
Sat
/
d
V .y/
d
y;
(3)where
v
Sat
is the saturation velocity of carriers. The denomi-nator in Eq. (3) signifies that the mobility is degraded due tothe velocity saturation effect. It may be noted that, in short-channel devices, the lateral electric field along the channel becomes comparable to the electric field at the velocity sat-uration point (
E
Sat
D
2v
Sat
=
n0
/
, and hence the drain cur-rent starts to be affected by velocity saturation. In the presenton-current model for short-channel DG MOSFETs, the valueof saturation velocity is taken as (1–1.4)
10
7
cm/s
Œ7;24
;
n0
D
0
=1
C
.V
GS
V
th
/
,
a fitting parameter rangingfrom 0.01 to 0.1;
V
th
is the threshold voltage of the device
Œ12
and
0
is the low field mobility. In our analysis, the Aroramodel for low field mobility has been taken into account for electron mobility as a function of temperature and doping con-centration
Œ25
:
0
D
88
T 300
0:57
C
1252
T 300
2:33
1
C
N
b
.x/1:432
10
17
T 300
2:546
:
(4)In charge-sheet approximation, the inversion charge
Q
inv
,seen in Eq. (2), is assumed to be located at the silicon surfacelike a very thin sheet of charge and is the difference of the totalsiliconbodycharge(
Q
Total
/
anddepletioncharge(
Q
Bulk
/
as
Œ17
i.e.,
Q
inv
D
Q
Total
Q
Bulk
:
(5)The total silicon body charge can be written as
Q
Total
D
C
ox
Œ2V
GS
V
fbf
V
fbb
f
.y/
b
.y/;
(6)where
C
ox
D
ox
=t
ox
is gate oxide capacitance,
ox
being the permittivity of the SiO
2
,
f
.y/
and
b
.y/
are the front and back surface potentials at
x
D
t
si
=2
and
x
D
t
si
=2
respec-tively
Œ12
;
V
fbf
and
V
fbb
are the flat band voltages related to thefront and back Si–SiO
2
interfaces, respectively, which can bedefined as
V
fbf
D
M
s
C
E
g
2q
C
kT q
ln
N
bf
n
i
;
(7)
V
fbb
D
M
s
C
E
g
2q
C
kT q
ln
N
bb
n
i
;
(8)where
M
,
s
and
E
g
are the metal work function, electronaffinity and band gap of the silicon, respectively;
N
bf
D
N
b
.x/
j
x
D
t
si
2
and
N
bb
D
N
b
.x/
j
x
D
t
si
2
are the acceptor den-sities at the front and back Si–SiO
2
interfaces, respectively.In particular, for symmetric DG MOSFETs,
V
fbf
D
V
fbb
D
V
fb
and
f
.y/
D
b
.y/
D
s
.y/
, hence the total density of charge in the silicon body will become
Q
Total
D
2C
ox
ŒV
GS
V
fb
s
.y/:
(9)Itmaybementionedthat,atthreshold,
f .b/
.y/
D
2˚
f .b/
andafterinversiongetspinnedat
2˚
f .b/
C
V.y/
where
˚
f .b/
isthe Fermi potential
Œ23
. Therefore Equation (6) may be writtenas
Q
Total
D
C
ox
Œ2V
GS
V
fbf
V
fbb
2.˚
f
C
˚
b
C
V.y//:
(10)Further, as the channel region is assumed to be fully de- pleted, the depletion charges
Q
Bulk
can be obtained as
Q
Bulk
D
q
Z
t
si
2
t
si
2
N
b
.x/
d
x;
(11)which on solving yields
Q
Bulk
D p
2
p
qcN
P
.2bX
f
a/
exp
aX
f
bX
2
f
.a
C
2bX
b
/
exp
aX
b
bX
2
b
;
(12)where,
X
f
D
X
j
x
D
t
si
2
D
t
si
C
2R
p
2
p
2
p
;
(13)
X
b
D
X
j
x
D
t
si
2
D
t
si
2R
p
2
p
2
p
;
(14)with the help of Eqs. (10) and (12), Equation (5) can be writtenas
Q
inv
D
C
ox
f
2V
GS
V
fbf
V
fbb
2Œ.˚
f
C
˚
b
C
V.y/
gC
q
p
2
p
cN
P
Œ.2bX
f
a/
exp
aX
f
bX
2
f
.a
C
2bX
b
/
exp
aX
b
bX
2
b
:
(15)Plugging Eqs. (3) and (15) into Eq. (2) and integrating on both sides from source to drain gives the following expressionof drain current in the linear region as054001-3
J. Semicond. 2013, 34(5) Sarvesh Dubey
et al.
I
D
D
W
n0
L
1
C
n0
V
DS
2v
Sat
L
C
ox
2V
GS
V
fbf
V
fbb
2
˚
f
C
˚
b
C
V
DS
2
V
DS
n
q
p
2
p
cN
P
.2bX
f
a/
exp
aX
f
bX
2
f
.a
C
2bX
b
/
exp
aX
b
bX
2
b
o
V
DS
!
(16)or,
I
D
D
C
ox
W
n0
L
1
C
0
V
DS
2
Sat
L
Œ.2V
GS
V
t
V
DS
/V
DS
;
(17)where
V
t
D
V
fbf
C
V
fbb
C
2˚
f
C
2˚
b
C
q
p
2
p
cN
P
.2bX
f
a/
exp
aX
f
bX
2
f
.a
C
2bX
b
/
exp
aX
b
bX
2
b
=C
ox
;
(18)or,
I
D
D
I
D0
1
C
n0
V
DS
2v
Sat
L;
(19)where
I
D0
isthedraincurrentwithoutvelocitysaturationgivenas
I
D0
D
C
ox
W
n0
L Œ.2V
GS
V
t
V
DS
/V
DS
:
(20)Clearly, if the lateral field along the channel,
V
DS
=L
, ismuch less than
E
Sat
D
2v
Sat
=
n0
, the drain current is hardlyaffectedbyvelocitysaturation.Theeffectofvelocitysaturationin Eq. (19) is to reduce
I
D
by a factor of
1
C
n0
V
DS
2v
Sat
L
.The saturation current occurs when
V
DS
>
V
GS
V
th
andcan be given as
I
DSat
D
Wv
Sat
Q
InvSat
;
(21)where
Q
InvSat
D
ŒC
ox
.2V
GS
V
t
V
DS
/
j
V
DS
D
V
DSat
is the in-version charge density at saturation and
V
DSat
is drain satura-tion voltage and can be obtained as follows.At
V
DSat
, the surface channel collapses near the drain endand the drain current becomes zero or pinched-off. Hence,
@I
D
@V
DS
ˇˇˇˇ
V
DS
D
V
DSat
D
0:
(22) Now utilizing Eq. (17) in Eq. (22), we get the followingexpression of drain saturation voltage as
V
DSat
D
K
1
˙
q
K
21
4K
2
K
3
2K
2
;
(23)where
K
1
D
C
ox
,
K
2
D
0
C
ox
=
Sat
L
and
K
3
D
K
1
.2V
GS
V
t
/
. Further, as the drain voltage (
V
DS
/
exceedsthe saturation voltage (
V
DSat
/
, the pinch-off point at the drainend starts to shift gradually towards the source end. Thus, the
Fig. 2. Variation of drain current (
I
D
/
against drain-to-source voltage(
V
DS
/
for different gate-to-source voltages (
V
GS
/
.
pinch-offareacorrespondstoareductionofthechannellength.This length goes from
L
to
L
0
D
L
L
. Consequently,
L
has to be estimated. The voltage drop
.V
DS
V
DSat
/
across theregion between pinch-off point and the drain is given as
Œ17;23
V
DS
D
V
DSat
C
l
Sat
E
Sat
sinh
.L=l
Sat
/;
(24)where
l
Sat
is the characteristic length of the saturated regiondefined as
Œ23
l
Sat
D
r
si
ox
t
ox
t
si
2 :
(25)
E
Sat
is the lateral electric field at saturation point given by
Œ23
E
Sat
D
2v
Sat
=
n0
;
(26)and
L
is referred to as the amount of channel length modu-lation (CLM) by the drain voltage given as
Œ17;23
L
D
l
Sat
ln
24
V
DS
V
DSat
l
Sat
E
Sat
C
s
V
DS
V
DSat
l
Sat
E
Sat
2
C
1
35
:
(27)The total channel length (
L/
is then replaced by
L
to
L
0
D
L
L
inEq.(23).Thesaturationcurrentcan,then,eventually be found by putting the expressions of
V
DSat
from Eq. (23) intoEq. (21).To get the smooth transition from linear to saturation re-gion a smoothing function called
V
DT
has been used as
Œ14;26
V
DT
D
V
DSat
1
ln
.1
C
exp
ˇK/
ln
.1
C
exp
ˇ/
;
(28)where
K
D
1
V
DS
V
DSat
and
ˇ
is a fitting parameter.
2.2. Transconductanceanddrainconductanceformulation
Transconductance quantifies the drain current variationwith gate-to-source voltage (
V
GS
/
. It can be given, in general,as
g
m
D
@I
D
@V
GS
ˇˇˇˇ
V
DS
:
(29)054001-4

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