of 32
All materials on our website are shared by users. If you have any questions about copyright issues, please report us to resolve them. We are always happy to assist you.
Related Documents
    TB67S109AFTG/FNG TOSHIBA BiCD Integrated Circuit Silicon Monolithic TB67S109AFTG, TB67S109AFNG CLOCK-in controlled Bipolar Stepping Motor Driver The TB67S109A is a two-phase bipolar stepping motor driver using a PWM chopper. The clock in decoder is built in. Fabricated with the BiCD process, rating is 50 V/4.0 A . Features ・ BiCD process integrated monolithic IC. ・ Capable of controlling 1 bipolar stepping motor. ・ PWM controlled constant-current drive. ・  Allows full, half, quarter, 1/8, 1/16, 1/32 step operation. ・ Low on-resistance (High + Low side=0.49 Ω (typ.)) MOSFET output stage. ・ High efficiency motor current control mechanism (Advanced Dynamic Mixed Decay) ・ High voltage and current (For specification, please refer to absolute maximum ratings and operation ranges) ・ Error detection (TSD/ISD) signal output function ・ Built-in error detection circuits (Thermal shutdown (TSD) 、 over-current shutdown (ISD), and power-on reset (POR)) ・ Built-in VCC regulator for internal circuit use. ・ Chopping frequency of a motor can be customized by external resistance and capacitor. ・ Multi package lineup TB67S109AFTG: P-WQFN48-0707-0.50-003 TB67S109AFNG: HTSSOP48-P-300-0.50 Note) Please be careful a  bout thermal conditions during use.   P-WQFN48-0707-0.50-003 HTSSOP48-P-300-0.50 FTG Weight 0.10g (typ.) FNG Weight 0.21g (typ.) © 2014 TOSHIBA Corporation 1 2014-04-07    TB67S109AFTG/FNG Pin assignment (TB67S109A) Please mount the four corner pins of the QFN package and the exposed pad to the GND area of the PCB. Please mount the exposed pad of the HTSSOP package to the GND area of the PCB. (Top View) 1 2 3 4 5 6 7 8 9 10 11 12 36 35 34 33 32 31 30 29 28 27 26 13 14 15 16 17 18 19 20 21 22 23 24 25 48 47 46 45 44 43 42 41 40 39 38 37 FTG    N   C   C   L   K   E   N   A   B   L   E   R   E   S   E   T   G   N   D   N   C   R   S   A   R   S   A   N   C   O   U   T   A   +   O   U   T   A   +   N   C NC NC GND OUTA- OUTA- GND GND OUTB- OUTB- GND NC NC    N   C   O   U   T   B   +   O   U   T   B   +   N   C   R   S   B   R   S   B   N   C   V   M    N   C   V   C   C   N   C   N   C NC LO DMODE0 GND VREFB VREFA OSCM CW/CCW MO DMODE1 DMODE2 NC 1 2 3 4 5 6 7 15 16 17 18 19 20 28 29 30 31 32 33 34 42 43 44 45 46 47 48 21 OSCM CW/CCW MO DMODE1 DMODE2 NC NC NC OUTA +  OUTA +  NC NC GND NC GND NC NC NC OUTB+ OUTB+ NC NC VREFB DMODE0 VREFA LO GND NC FNG (Top View) 22 23 24 25 26 27 8 9 10 11 12 13 14 35 36 37 38 39 40 41 CLK ENABLE RESET GND NC RSA RSA OUTA -  OUTA -  GND GND OUTB -  OUTB -  NC RSB RSB VM NC VCC NC 2 2014-04-07    TB67S109AFTG/FNG TB67S109A Block diagram Functional blocks/circuits/constants in the block chart etc. may be omitted or simplified for explanatory purposes.   DMODE0 DMODE1 DMODE2 ENABLE RESET CLK CW/CCW Standby Control + Step Resolution Selector VREFA VREFB Motor Oscillator OSCM VCC Regulator VCC TSD ISD RSB Motor Control Logic Predriver RSA VM Signal Decode Logic Current Reference Setting Current Comp Current Comp Predriver Current Level Set Power-on Reset LO Error Output  Angle monitor MO OSC-Clock Converter System Oscillator GND OUTB+ OUTB- OUTA+ OUTA- H-bridge H-bridge 3 2014-04-07    TB67S109AFTG/FNG  Application Notes  All the grounding wires of the TB67S109A must run on the solder mask on the PCB and be externally terminated at only one point. Also, a grounding method should be considered for efficient heat dissipation. Careful attention should be paid to the layout of the output, VDD(VM) and GND traces, to avoid short circuits across output pins or to the power supply or ground. If such a short circuit occurs, the device may be permanently damaged.  Also, the utmost care should be taken for pattern designing and implementation of the device since it has power supply pins (VM, RS, OUT, GND) through which a particularly large current may run. If these pins are wired incorrectly, an operation error may occur or the device may be destroyed. The logic input pins must also be wired correctly. Otherwise, the device may be damaged owing to a current running through the IC that is larger than the specified current. 4 2014-04-07


Jun 13, 2018

O voo

Jun 13, 2018
Similar documents
We Need Your Support
Thank you for visiting our website and your interest in our free products and services. We are nonprofit website to share and download documents. To the running of this website, we need your help to support us.

Thanks to everyone for your continued support.

No, Thanks