L F 3 5 3 - N SNOSBH3F –APRIL 1998–REVISED MARCH 2013 L F 3 5 3 - N W id e B a n d wid th D u a l J F E T I n p u t O p e r a tion a l A mp l if ie r Ch e ck f or Sa mp l e s: L F 3 5 3 - N 1F E A T URE S D E SCRI PT I O N These devices are low cost, high speed, dual JFET 2ã I n te r n a l l y T r imme d O f f se t Vol ta ge : 10 mV input operational amplifiers with an internally trimmed ã L ow I n p u t B ia s Cu r r e n t: 5 0p A input offset voltage
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  LF353-N  SNOSBH3F –APRIL 1998–REVISED MARCH 2013 LF353-N W ide B andw idth D ual JFET Input O perational A m plifier Check for Samples: LF353-N 1 FEATURES DESCRIPTION These devices are low cost, high speed, dual JFET 2 ã Internally Trimmed Offset Voltage: 10 mV input operational amplifiers with an internally trimmed ã Low Input Bias Current: 50pA input offset voltage (BI-FET II technology). They ã Low Input Noise Voltage: 25 nV/ √ Hz  require low supply current yet maintain a large gainbandwidth product and fast slew rate. In addition, well ã Low Input Noise Current: 0.01 pA/ √ Hz matched high voltage JFET input devices provide ã Wide Gain Bandwidth: 4 MHz very low input bias and offset currents. The LF353-N ã High Slew Rate: 13 V/ μ s  is pin compatible with the standard LM1558 allowingdesigners to immediately upgrade the overall ã Low Supply Current: 3.6 mA performance of existing LM1558 and LM358 designs. ã High Input Impedance: 10 12 Ω These amplifiers may be used in applications such as ã Low Total Harmonic Distortion :  ≤ 0.02% high speed integrators, fast D/A converters, sample ã Low 1/f Noise Corner: 50 Hz and hold circuits and many other circuits requiring low ã Fast Settling Time to 0.01%: 2  μ s  input offset voltage, low input bias current, high inputimpedance, high slew rate and wide bandwidth. Thedevices also exhibit low noise and offset voltage drift. Typical Connection 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications ofTexas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 2 All trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Copyright © 1998–2013, Texas Instruments Incorporated Products conform to specifications per the terms of the TexasInstruments standard warranty. Production processing does notnecessarily include testing of all parameters.  LF353-N SNOSBH3F –APRIL 1998–REVISED MARCH 2013 Simplified Schematic Figure 1. 1/2 Dual Dual-In-Line PackageTop View Figure 2. 8-Pin SOIC (See D Package)8-Pin PDIP (See P Package) 2  Submit Documentation Feedback   Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links:  LF353-N   LF353-N  SNOSBH3F –APRIL 1998–REVISED MARCH 2013 These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foamduring storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1)(2) Supply Voltage ±18VPower Dissipation See (3) Operating Temperature Range 0°C to +70°CT  j (MAX) 150°CDifferential Input Voltage ±30VInput Voltage Range (4) ±15VOutput Short Circuit Duration ContinuousStorage Temperature Range  − 65°C to +150°CLead Temp. (Soldering, 10 sec.) 260°CSoldering Information: Dual-In-Line Package Soldering (10 sec.) 260°CSmall Outline Package Vapor Phase (60 sec.) 215°CInfrared (15 sec.) 220°CESD Tolerance (5) 1000V θ JA  D Package TBD(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions forwhich the device is functional, but do not ensure specific performance limits. Electrical Characteristics state DC and AC electricalspecifications under particular test conditions which ensure specific performance limits. This assumes that the device is within theOperating Ratings. Specifications are not ensured for parameters where no limit is given, however, the typical value is a good indicationof device performance.(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability andspecifications.(3) For operating at elevated temperatures, the device must be derated based on a thermal resistance of 115°C/W typ junction to ambientfor the P package, and 160°C/W typ junction to ambient for the D package.(4) Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.(5) Human body model, 1.5 k Ω  in series with 100 pF. Copyright © 1998–2013, Texas Instruments Incorporated  Submit Documentation Feedback   3Product Folder Links:  LF353-N   LF353-N SNOSBH3F –APRIL 1998–REVISED MARCH 2013 DC Electrical Characteristics LF353-NSymbol Parameter Conditions UnitsMIn Typ Max V OS  Input Offset Voltage R S =10k Ω , T A =25°C 5 10 mVOver Temperature13 mV Δ V OS  /  Δ T Average TC of Input Offset Voltage R S =10 k Ω  10  μ V/°CI OS  Input Offset Current T  j =25°C (1)(2) 25 100 pAT  j ≤ 70°C 4 nAI B  Input Bias Current T  j =25°C (1)(2) 50 200 pAT  j ≤ 70°C 8 nAR IN  Input Resistance T  j =25°C 10 12 Ω A VOL  Large Signal Voltage Gain V S =±15V, T A =25°C 25 100 V/mVV O =±10V, R L =2 k Ω Over Temperature 15 V/mVV O  Output Voltage Swing V S =±15V, R L =10k Ω  ±12 ±13.5 VV CM  Input Common-Mode Voltage V S =±15V ±11 +15 VRange  − 12 VCMRR Common-Mode Rejection Ratio R S ≤  10k Ω  70 100 dBPSRR Supply Voltage Rejection Ratio See (3) 70 100 dBI S  Supply Current 3.6 6.5 mA(1) These specifications apply for V S =±15V and 0°C ≤ T A ≤ +70°C. V OS , I B and I OS  are measured at V CM =0.(2) The input bias currents are junction leakage currents which approximately double for every 10°C increase in the junction temperature,T  j . Due to the limited production test time, the input bias currents measured are correlated to junction temperature. In normal operationthe junction temperature rises above the ambient temperature as a result of internal power dissipation, P D . T  j =T A + θ  jA  P D  where  θ  jA  is thethermal resistance from junction to ambient. Use of a heat sink is recommended if input bias current is to be kept to a minimum.(3) Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance withcommon practice. V S  = ±6V to ±15V. AC Electrical Characteristics (1) LF353-NSymbol Parameter Conditions UnitsMin Typ Max Amplifier to Amplifier Coupling T A =25°C, f=1 Hz − 20 kHz − 120 dB(Input Referred)SR Slew Rate V S =±15V, T A =25°C 8.0 13 V/  μ sGBW Gain Bandwidth Product V S =±15V, T A =25°C 2.7 4 MHze n  Equivalent Input Noise Voltage T A =25°C, R S =100 Ω , f=1000 Hz 16 nV/  √ Hzi n  Equivalent Input Noise Current T  j =25°C, f=1000 Hz 0.01 pA/  √ HzTHD Total Harmonic Distortion A V =+10, RL=10k, V O =20Vp − p,<0.02 %BW=20 Hz-20 kHz(1) These specifications apply for V S =±15V and 0°C ≤ T A ≤ +70°C. V OS , I B and I OS  are measured at V CM =0.4  Submit Documentation Feedback   Copyright © 1998–2013, Texas Instruments Incorporated Product Folder Links:  LF353-N 
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