Synthesis of GF(3) Based Reversible/QuantumLogic Circuits Without Garbage Output
Md. Mahmud Muntakim Khan, Ayan Kumar Biswas, Shuvro Chowdhury, Masud Hasan and Asif Islam Khan
δ
Abstract
—We present a method of synthesizing Ternary GaloisField (GF(3)) based reversible/quantum logic circuits without anyancillary trits/qutrits and hence without any garbage outputs. Werealize multi input ternary Toffoli gate and square functions of GF(3) variables using linear ion trap realizable MuthukrishnanStroud (MS) gates and shift gates in the absence of ancillaryqutrits. Then based on the Galois Field Sum of Products (GFSOP)expression of a multivariable GF(3) function, we synthesize thecorresponding circuit.
Index Terms
—Reversible/quantum computing, Ternary Galoisﬁeld (GF3), trit, ternary Toffoli gate, Galois ﬁeld sum of product(GFSOP).
I. I
NTRODUCTION
Multiple valued quantum logic (MVQL) provides a route toscale up quantum computer by simplifying the logical network [1]. Muthukrishnan
et al.
[1] showed that an arbitrary multiplevalued logic operations on any number of multiple valuedqudits (quantum digits) can be decomposed into elementarylogic gates that operate on only two qudits at a time. We referto these elementary two qudit gates as MuthukrishnanStroudor MS gates. Ternary quantum systems offers several beneﬁtover its binary and other multiple valued counterparts, suchas optimization of Hilbert space dimensionality for quantumcomputers [2], better security for some quantum cryptographicprotocols such as quantum bit commitment and coinﬂippingprotocols [3], [4]. Proposals to built qutrit quantum computersappeared in literature [5], [6].To synthesize quantum logic circuits, AlRabadi
et al.
[7], [8] proposed Galois ﬁeld based approach. The particularadvantage of Galois ﬁeld for MVQL is that arbitrary multiplevalued Galois ﬁeld operations can be used in the Toffoli gatesof the ESOPbased (Exclusive SumsofProducts) realizationof binary reversible circuits, where Galois addition and multiplication replace the XOR and And gates respectively. Khan
et al.
[9], [10] presented a method of synthesizing ternaryGalois ﬁeld sum of products (GFSOPs) using cascades of multiple input ternary Toffoli and swap gates. Realization of 3input ternary Toffoli gate on top of MS gate without ancillaryqutrit was presented by Khan
et al.
[11]. Realization of
k
input(
k >
3
) binary Toffoli gate was presented in [12]. A
k
input
M. M. M. Khan, A. K. Biswas, S. Chowdhury are with the Department of Electrical and Electronic Engineering, Bangladesh University of Engineeringand Technology, Dhaka 1000, Bangladesh.M. Hasan is with the Department of Computer Science and Engineering, Bangladesh University of Engineering and Technology, Dhaka 1000,Bangladesh.(email: masudhasan@cse.buet.ac.bd.)A. I. Khan is with the Department of Electrical Engineering and ComputerSciences, University of California, Berkeley, CA 94720, USA. (
δ
email:asif@eecs.berkeley.edu.)TABLE IGF3
ADDITION AND MULTIPLICATION
+ 0 1 2
·
0 1 20
0 1 2
0
0 0 0
1
1 2 0
1
0 1 2
2
2 0 1
2
0 2 1
TABLE IIR
EVERSIBLE OPERATIONS IN
GF(3). T
HE CORRESPONDING GATESYMBOLS ARE ALSO SHOWN
.
y= y= y= y= y= y= x x x+1 x+2 2x 2x+1 2x+2
0
0 1 2 0 1 2
1
1 2 0 2 0 1
2
2 0 1 1 2 0
Gate Symbol
= +1 +2 12 01 02(
k >
3
) ternary Toffoli gate can be realized in a similar wayusing cascades of 3 input ternary Toffoli gate and
(
k
−
2)
ancillary bits. To design efﬁcient ternary quantum circuits, it isnecessary to optimize both the number of gates and the numberof ancillary bits. To date, no work has reported a universalmethod to realize quantum ternary GFSOP expressions usingternary MS gates without ancillary qutrits. In this paper, wepresent a method of synthesizing a quantum circuit realzinga multivariable GF(3) function rom its truth table on top of MS gates in the absence of any ancillary qutrit.II. T
ERNARY
G
ALOIS
F
IELD
A
RITHMETICS
Galois ﬁeld is an algebraic structure or ﬁeld that containsonly ﬁnitely many elements. Two basic operations in Galoisﬁeld are addition (denoted by +) and multiplication (denotedby
·
or absence of any operator). Ternary Galois Field (GF(3))consists of the set of elements T = 0, 1, 2 and addition andmultiplication in GF3 are deﬁned in table I.III. T
ERNARY
G
ALOIS
F
IELD
S
UM OF
P
RODUCTS
E
XPRESSIONS
There are six reversible operations in GF(3) that operates ona single variable. They are tabulated in table II. Correspondingto these six reversible operations, there are six reversibleternary gates that operate on single qutrit. We call these gatesshift gates. The generic symbol of the shift gates are shownin ﬁgure 1.
39th International Symposium on MultipleValued Logic
0195623X/09 $25.00 © 2009 IEEEDOI 10.1109/ISMVL.2009.7398
Fig. 1. Ternary shift gates.
P
and
Q
are the input and output qutritsrespectively.
z
∈ {
=
,
+1
,
+2
,
+3
,
12
,
01
,
02
}
.TABLE IIIE
XAMPLES OF SINGLE VARIABLE COMPOSITE FUNCTIONS
.
x x
2
=
x.x x
3
=
x
2
.x x
(
x
+ 1) 2
x
2
+ 1
0
0 0 0 2
1
1 1 2 1
2
1 2 0 1With these reversible function, functions of a variable canbe formed which might not be reversible. Few examples of such functions are shown in Table III.We deﬁne a special irreversible single variable function, 1Reduced Post Literals (RPL) as:
i
x
= 2(
x
+ 2
i
)
2
+ 1
(1)The truth table of the RPLs are shown in table III.For a ternary function
f
(
x
1
,x
2
,...,x
i
,...x
n
)
, we deﬁne thecofactors with respect to the variable
x
i
as:
f
0
=
f
(
x
1
,x
2
,...,x
i
= 0
,...,x
n
)
(2)
f
1
=
f
(
x
1
,x
2
,...,x
i
= 1
,...,x
n
)
(3)
f
2
=
f
(
x
1
,x
2
,...,x
i
= 2
,...,x
n
)
(4)Any ternary function
f
(
x
1
,x
2
,,x
i
,,x
n
)
can be expandedin terms of all the variables using RPLs and cofactors usingthe following relation.
f
(
x
1
,x
2
,...,x
i
,...x
n
) =
0
x
i
·
f
0
+
1
x
i
·
f
1
+
2
x
i
·
f
2
=
2
p
=0
(
p
x
i
·
f
p
)=
2
p
1
=02
p
2
=0
...
2
p
n
=0
n
i
=1
p
i
x
i
·
f
(
p
1
,p
2
,...p
n
)
(5)where
f
(
p
1
,p
2
,...p
n
)
refers to the value of
f
(
x
1
,x
2
, ...,x
n
)
when
x
1
=
p
1
,x
2
=
p
2
,...x
n
=
p
n
. Wecall this expression the Galois ﬁeld sum of products (GFSOP)form.Table III shows the truth table of ternary function
f
(
A,B,C
)
. The GFSOP expression of
f
(
A,B,C
)
is shown
TABLE IVT
ERNARY
1R
EDUCED
P
OST
L
ITERALS
0
x
=
1
x
= 2(
x
+ 2)
2
+ 1
2
x
= 2(
x
+ 1)
2
+ 1
x
2
x
2
+ 1 = 2
x
2
+ 2
x
= 2
x
2
+
x
0 1 0 01 0 1 02 0 0 1
TABLE VT
RUTH TABLE FOR
f
(
A,B,C
)
.
AB
→
00 01 02 10 11 12 20 21 22C
↓
1 1 1 2 0 1 2 0 11 0 0 0 1 0 0 1 01 2 2 1 2 2 1 2 2in Eq. 6. In the following sections, we will realize a MS gaterealizable logic circuit without any ancillary qutrit.
f
(
A,B,C
) =
2
p
=02
q
=02
r
=0
p
A
·
q
B
·
r
C
·
f
(
p,q,r
)=
A
2
BC
+
A
2
B
+
A
2
C
+
A
2
+ 2
B
2
C
+ 1
(6)IV. Q
UANTUM
G
ATES
An important gate for designing ternary quantum circuitsis the ternary MS gates. MS gate is realizable using linearion trap scheme for quantum computing [13]. The diagram of a ternary MS gate is shown in Figure 2. Here, input
A
isthe
controlling input
and input
B
is the
controlled input
. Theoutput
P
is equal to the input
A
. If
A
= 2
, the other output
Q
is the
Z
transform of the input
B
, otherwise
Q
=
B
.Figure 3 shows a modiﬁed ternary MS gate. Here, if
A
=
x
,where,
x
=
0, 1, 2, the other output
Q
is the
Z
transform of the input
B
, otherwise
Q
=
B
. Figure 4 shows the realizationof this circuit using MS gate and shift gates.Another important gate is the ternary Feynman gate (Fig.5(a)). It has two inputs A and B and two outputs P and Q.The outputs are equal to A and the GF3 sum of A and Brespectively. Its realization by MS gates in Figure 5(b).V. T
HREE
I
NPUT
T
ERNARY
T
OFFOLI
G
ATE
Diagram of a ternary Toffoli gate and its truth table areshown in Figure 6. The inputs
A
and
B
are the controlling
Fig. 2. Ternary MuthukrishnanStroud gate.Fig. 3. Modiﬁed ternary MuthukrishnanStroud gate. Here,
Z
∈ {
+1, +2,01, 02, 12
}
99
Fig. 4. Realization of modiﬁed ternary MuthukrishnanStroud gate. Here,
u
and
v
follows the GF3 relations,
u
+
x
= 2
and
2 +
v
=
x
. For example, if
x
= 1, then
u
= 1 and
v
= 2.Fig. 5. Ternary Feynman gate. (a) Realization using MS gates. (b)
input and
C
is the controlled input. The output
P
and
Q
areequal to
A
and
B
, respectively, and
R
is equal to
A
·
B
+
C
.An efﬁcient realization of this gate was presented in [11]. Therealization is shown in Fig. 7 using modiﬁed MS gates andFeynman gates. Note that this circuit does not require anyancillary qutrit.VI.
k

INPUT
T
ERNARY
T
OFFOLI
G
ATE
,
k >
3
Figure 8 shows the diagram of a ternary Toffoli gate with
(
N
+1)
inputs. The ﬁrst
N
inputs,
A
1
to
A
N
pass unchangedfrom input to output, while
A
1
·
A
2
·
A
3
...
·
A
N
+
A
N
+1
is obtained at the
(
N
+ 1)
th wire. This gate can easily berealized in terms of three input Toffoli gates. Realization of thebinary version of this gate has been presented in [12], whichis also applicable for the ternary case. However, realization inthis method will require
(
N
−
1)
ancillary qutrits and produce
(
N
−
1)
garbage outputs.Figure 9 shows the realization of a four input Toffoli gate.The correctness of this circuit can be veriﬁed from the truthtable at the intermediate points of the circuit. This design
Fig. 6. Ternary Toffoli gate. (a) Its truth table. (b)Fig. 7. Realization of ternary Toffoli gate using modiﬁed MS gates andFeynman gates. The truth tables at the intermediate points are also shown.The circuit can be veriﬁed immediately from the truth tables.Fig. 8. Ternary Toffoli gate with
(
N
+ 1)
inputs.
methodology can be extended to implement Toffoli gates withhigher number of inputs. Figure 10 shows the realization of a ﬁve input ternary Toffoli gate using two four input Toffoligates and modiﬁed MS gates. Figure 11 shows the realizationof an
(
N
+1)
input ternary Toffoli gate using
N
input Toffoligates. Since the realization of a three input ternary Toffoli gatedoes not require any ancillary qutrit, this circuit also does not
Fig. 9. Realization of four input ternary Toffoli gate.
100
Fig. 10. Realization of ﬁve input ternary Toffoli gate.
require any ancillary qutrit and hence does not produce anygarbage output.VII. S
QUARE OPERATION IN QUANTUM TERNARY LOGIC
Maximum power of a variable in the GFSOP expansion of aternary function is 2, since for any ternary variable
A
,
A
3
=
A
(see Table III). Figures 12 and 13 shows the realization
A
2
+
D
and
A
2
B
+
D
in the wire of the variable,
D
. The correctness of the circuits can be veriﬁed by examining the truth tables at theintermediate points and the truth table of square operation (seeTable III). Figures 14 and15 show the realization of
A
2
B
2
+
D
and
A
2
B
2
C
2
+
D
respectively.VIII. R
EALIZATION OF THE CIRCUIT FROM THE TRUTHTABLE OF A MULTI

VARIABLE
GF(3)
FUNCTION WITHOUTANY ANCILLARY QUTRIT
Now we can realize the ternary circuit corresponding to amultivariable GF(3) function in truth table form. Given thetruth table of a function, we can expand the function in termsof all the variables in GFSOP form using the method described
Fig. 11. Realization of
(
N
+ 1)
input ternary Toffoli gate.Fig. 12. Realization of
A
2
+
D
.Fig. 13. Realization of
A
2
B
+
D
.Fig. 14. Realization of
A
2
B
2
+
D
.Fig. 15. Realization of
A
2
B
2
C
2
+
D
.
in Section III. Using the method described in Sections IV andV, the circuit can be generated using modiﬁed MS gates andmultiinput Toffoli gates. Since both of these types of gatescan be synthesized using only shift gates and MS gates andwithout ancillary qutrits, the circuit realization of the circuitcontains only shift gates and MS gates and no ancillary qutritsand hence does not produce any garbage output. Figure 16shows the realization of the function,
f
(
A,B,C
)
presented inSection III.
101
Fig. 16. Realization of
f
(
A,B,C
)
.
IX. C
ONCLUSION
We presented a framework for realizing the circuit of amultivariable GF(3) function from its truth table using onlyMS gates and shift gates without ancillary qutrits and hencewithout garbage outputs. Since MS and shift gates are linearion trap realizable, the circuits will also be linear ion traprealizable. However, the number of gates to realize a
N
+ 1
input Toffoli gate increases exponentially with the numberof inputs. Given the relative cost of implementation of MS gates, shift gates and ancillary qutrits in a circuit, it wouldbe worthwhile to see whether it is possible to optimize thecost function a circuit allowing a few ancillary qutrits.R
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