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A Backside-Illuminated Image Sensor With 200 000 Pixels Operating at 250 000 Frames per Second

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In this paper, a high-speed image sensor with very high sensitivity is developed. The high sensitivity is achieved by introduction of backside illumination and charge-carrier multiplication (CCM). The high frame rate is guaranteed by installing the
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  2556 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 56, NO. 11, NOVEMBER 2009 A Backside-Illuminated Image Sensor With 200000Pixels Operating at 250000 Frames per Second Cuong Vo Le, T. Goji Etoh, H. D. Nguyen, V. T. S. Dao, H. Soya, Michael Lesser, David Ouellette,H. van Kuijk, J. Bosiers,  Senior Member, IEEE  , and G. Ingram  Abstract —In this paper, a high-speed image sensor with veryhigh sensitivity is developed. The high sensitivity is achieved byintroduction of backside illumination and charge-carrier multipli-cation (CCM). The high frame rate is guaranteed by installing the in situ  storage image sensor (ISIS) structure on the front side. Atest sensor of the BSI-ISIS has been developed and evaluated. It isshown that an image with a very low signal level embedded underthe noise floor is recognizable by activating the CCM.  Index Terms —Charge-carrier multiplication (CCM), highsensitivity, high speed,  in situ  storage image sensor (ISIS). I. I NTRODUCTION A N IMAGE sensor which captures images at 1000000frames per second (1 Mfps) was developed byEtoh  et al.  [1] in 2001. During an image-capturing operation,image signals are stored in linear  in situ  CCD memories simul-taneously at all pixels. This ultimate parallel-recording opera-tion enables the ultrahigh-frame-rate image capture. Therefore,the image sensor was named as the  in situ  storage image sensor(ISIS). Since its sensitivity is not sufficient for the ultrahigh-speed imaging in cell biology and nano/microtechnologies, westarted the development of an image sensor with much highersensitivity as well as very high frame rate. To achieve the veryhigh sensitivity, backside illumination and the charge-carriermultiplication (CCM) invented by Hynecek [2] are introduced.The very high frame rate is guaranteed by installing the ISISstructure on the front side. A test sensor of the backside-illuminated ISIS, named ISIS-V12, has been developed andevaluated. This paper reports results of the preliminaryevaluation.In the following sections, the previously developed front-sideilluminated ISIS is referred to as FSI-ISIS and the backside-illuminated one currently under development as BSI-ISIS. Manuscript received January 6, 2009; revised May 27, 2009. First pub-lished September 29, 2009; current version published October 21, 2009. Thiswork was supported by the Development of Systems and Technology forAdvanced Measurement and Analysis, Japan Science and Technology Agency(JST-SENTAN). The review of this paper was arranged by Editor N. Teranishi.C. Vo Le, T. G. Etoh, H. D. Nguyen, and V. T. S. Dao are with KinkiUniversity, Higashi-Osaka 577-8502, Japan.H. Soya is with Shimadzu Corporation, Kyoto 604-8511, Japan.M. Lesser and D. Ouellette are with the University of Arizona, Tucson,AZ 85721 USA.H. van Kuijk and J. Bosiers are with DALSA Professional Imaging, 5656 AEEindhoven, The Netherlands.G. Ingram is with DALSA Digital Imaging, Waterloo, ON N2V 2E9,Canada.Color versions of one or more of the figures in this paper are available onlineat http://ieeexplore.ieee.org.Digital Object Identifier 10.1109/TED.2009.2030601Fig. 1. Architecture of ISIS-V12. II. S TRUCTURE OF THE  B ACKSIDE -I LLUMINATED  ISIS  A. Front-Side Structure Figs. 1 and 2, respectively, show the architecture and theschematic diagram of the front side of the ISIS-V12. Thepixel count is 400 × 489  (=  195600 )  pixels. It consists of fourindependent blocks, each with a photoreceptive area (100  × 489 pixels), an HCCD, a CCM, and an amplifier. To finda proper design condition of the CCM, different impurity-concentration profiles are applied to the four blocks.As shown in Fig. 2, during an image-capturing operation,signal electrons are transferred to a collection gate and thenstored in an  in situ  slanted linear CCD memory of each pixel.When a target event is detected, a trigger signal is releasedto stop the continuous-overwriting image-capturing operation.Then, the signal electrons stored inside the photoreceptive areaof the four blocks are read out to a buffer memory outside thesensor.In the design of FSI image sensors, the vertical overflowdrain (VOD) is commonly employed for electronic shutteringand antiblooming functions. In the present BSI-ISIS design,shuttering, antiblooming, and overwriting functions are incor-porated into one common horizontal drain.The first element of the CCD memory is the input gate,beside which an antiblooming drain gate is attached to au-tomatically drain excessive signal electrons to the drain. Theantiblooming drain is also used for electronic shuttering. Signalelectrons are then transferred along the CCD memory to the 0018-9383/$26.00 © 2009 IEEE  VO LE  et al. : BACKSIDE-ILLUMINATED IMAGE SENSOR WITH 200000 PIXELS 2557 Fig. 2. Schematic diagram of the front-side circuitry of the BSI-ISIS. end, where an overwriting drain gate is installed. Old signalsare continuously drained through the overwriting drain gate,and a sequence of the latest image signals is always stored inthe CCD memory during the image-capturing operation.The number of frames is equal to the number of CCDelements in one linear CCD memory, which is 117 for theISIS-V12.Arrows in Fig. 1 show the read-out direction of the imagesignals. The signals inside the memory CCDs of the photore-ceptive area are transferred to the HCCD, then to the CCM andto the amplifier, and finally to the outside of the sensor.The left dicing line of the sensor is very close to block 1 of the photoreceptive area to allow for doubling the pixelcount by butting two chips of the ISIS-V12 in the next stageof development [3].  B. Cross-Sectional Structure The ISIS-V12 has a unique cross-sectional structure concep-tually shown in Fig. 3.The linear CCD memory is installed in a p-well in then-epilayer on the front side, creating an efficient potential bar-rier to prevent migration of the signal electrons to the memory. Fig. 3. Cross section of BSI-ISIS (A–A’ cross section in Fig. 2).Fig. 4. Example of the concentration profile of the special wafer with doublen-p epitaxial layers. The thickness, which is more than 30  µ m, prevents thebackside incident light, with wavelength shorter than 650 nm,from directly reaching the CCD memory in the p-well.We developed a custom-made wafer with double epitaxiallayers, as shown in Fig. 4. The wafer has a smoothly chang-ing n- and p-concentration profile creating a built-in potentialprofile to effectively transfer signal electrons from the backsideto a collection gate in the front side. Fig. 4 shows an exampleconcentration profile of the double epilayers. Fig. 5 shows anexample of a simulated electric field of the  X  − Z   section andthe transfer route of a signal electron from the backside to thefront side.With optimization of the cross-sectional structure, all thesignal electrons created in the generation layer of a pixel firstmove horizontally in the collection layer and, then, vertically tothe collection gate on the front side.III. E VALUATION OF  P ERFORMANCE  A. Frame Rate and Dynamic Range Table I shows specifications of the ISIS-V12 and the ISIS-V2, i.e., the first test sensor of the BSI-ISIS and the previoussensor of FSI-ISIS, respectively. The ISIS-V12 is cooled downto − 40  ◦ C. The charge-handling capacity is 10000 e − , the total  2558 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 56, NO. 11, NOVEMBER 2009 Fig. 5. Simulated electric field of  X  − Z   section of a BSI-ISIS.TABLE IS PECIFICATION OF  T EST  S ENSOR OF  BSI-ISIS (ISIS-V12) AND  FSI-ISIS (ISIS-V2) noise level of the system of the evaluation camera mounting thetest sensor is around 9 e − .For up to 250 kfps, the dynamic range is approximately10 bits, independent of the frame rate, but decreases for framerates from 500 kfps to 1 Mfps. The reduction of the dynamicrange results from attenuation of amplitudes of driving voltagesmainly due to resistance of the metal wiring.  B. Comparison of Sensitivity of BSI-ISIS and FSI-ISIS  The simplest way to show improvement of the performance,including an increase of sensitivity, is comparison of the testsensor of the BSI-ISIS with the existing FSI-ISIS. The testsensor has much higher spatial resolution with 400 × 489 (= 195600 ) pixels,whiletheFSI-ISIShas312 × 260 (= 81120 ) pixels.Fig. 6 shows two images of a laser-beam chopper taken bythe two cameras using these two sensors. The imaging condi-tion is exactly the same, except the frame rates: 8 and 1 kfps,respectively, for images taken by the BSI-ISIS [Fig. 6(a)] andthe FSI-ISIS [Fig. 6(b)]. The CCM of the BSI-ISIS is notactivated.Although the image of the BSI-ISIS was taken at eight timeshigher frame rate, it is brighter than that of the FSI-ISIS, which Fig. 6. Comparison of brightness of BSI-ISIS (ISIS-V12) and FSI-ISIS (ISIS-V2). Temperature: 25  ◦ C. Lens: Nikkor 50 mm. Iris: F1.2. Illumination: 300lx.A: Pixel area used to calculate average output signal,  S  MES , in Table II.B: Upper right quarter part of a laser-beam chopper to be shown in Fig. 8.(a) BSI-ISIS 8000 fps (200 kpixels). (b) FSI-ISIS 1000 fps (80 kpixels). proves that the BSI-ISIS without cooling and the CCM hasabout ten times higher sensitivity than the existing FSI-ISIS.The FSI-ISIS is equipped with a memory area in each pixelwhich is covered by a metal light shield. Therefore, the fillfactor is very low, about 13%. While the pixel size of theBSI-ISIS is much smaller than that of the FSI-ISIS, the 100%fill factor and higher quantum efficiency mainly provide theBSI-ISIS with the ten times higher sensitivity even at roomtemperature (refer to the Appendix).As is shown in Table I, the average values of quantumefficiency of the ISIS-V12 and the ISIS-V2 are estimated to beabout 30% and 20%, respectively.The upper limit of the wavelength of the ISIS-V12 is650 nm. Incident light longer than 650 nm is cut by an opticalfilter, since light with longer wavelength is not completelyabsorbed by the silicon of 30- µ m thickness and directly reachestheCCDmemoryinthep-wellonthefrontside.Theupperlimitcan be increased by using a thicker double epilayer with lowerconcentrations. C. Efficiency of CCM  The CCM is a very efficient CCD-specific amplificationmethod, utilizing a multistep impact-ionization process [2]. Ineach CCD element, a high electric field created by a large volt-age difference  ∆ V  CCM  of two adjacent electrodes accelerates  VO LE  et al. : BACKSIDE-ILLUMINATED IMAGE SENSOR WITH 200000 PIXELS 2559 Fig. 7. Efficiency of CCM. Average of output signal level, standard deviation,and SNR versus  ∆ V   CCM . Frame rate: 8 kfps. Temperature:  − 40  ◦ C. :Image recognizable.TABLE IIA MPLIFICATION OF  V ERY  W EAK  S IGNALS BY  M EANS OF  CCM F RAME R ATE : 8 kfps, T EMPERATURE : − 40  ◦ C,  ( ∗ ) S  oMES , ( ∗∗ )  I MAGE  R ECOGNIZABLE electrons to generate a very small number of secondary elec-trons. By repeating this independent impact-ionization process,signals are amplified with a higher rate than that of the addi-tional random noise associated with the process.Fig. 7 and Table II show  ∆ V  CCM  versus the average S  MES  of output signal from pixels of the test sensor in a rectangular areaA shown in Fig. 6, where  S  MES  is a measured average signallevel. The imaging condition is also described in the table.Incident light to the sensor is very weak and further reducedby attaching four ND filters with reduction factors of 1/8, 1/4,1/4, and 1/2 in front of the lens of the test camera.In Table II, the standard deviation  N  MES , the measuredSN ratios  SNR MES  (=  S  MES /N  MES ) , and the amplificationfactors  F  CCM  (=  S  MES /S  oMES )  are also tabulated, where S  oMES  is the measured average signal level without the CCMamplification.Table III shows the average, standard deviation, and SNR forthe output signals amplified by the camera amplifier mountedoutside the sensor without the CCM amplification.From these figures and tables, it is observed that the follow-ing conditions are obtained.1) The amplification factor  F  CCM  of the CCM sharplyincreases for  ∆ V  CCM  >  26 V, which reaches about300 times for  ∆ V  CCM  =  29 V.2) When the output signals are amplified by the cameraamplifier, the measured signal-to-noise ratio  SNR MES TABLE IIIA MPLIFICATION OF  V ERY  W EAK  S IGNALS BY  M EANS OF  C AMERA A MPLIFIER . F RAME  R ATE : 8 kfps, T EMPERATURE : − 40  ◦ C,  ( ∗ ) S  oMES stays at a constant value of 0.9. On the other hand, whenthe CCM is applied,  SNR MES  increases from 0.8 andexceeds 2.0 for  ∆ V  CCM  >  27 V, as shown in Table IIand Fig. 7.Fig. 8 shows example images for these imaging conditions.The object is the upper right quarter of the laser-beam choppershown with B in Fig. 6. It is noticeable that the chopper isrecognizable for the CCM amplification with  ∆ V  CCM  >  27 V,for which  SNR MES  >  2.0, while only noise can be observedfor the camera amplification.It is shown that a very weak image signal embedded in thenoise floor becomes recognizable by application of CCM, asshown in Fig. 8(a), which cannot be detected by a conventionalamplifier, as shown in Fig. 8(b).  D. Other Problems We found many other problems during the evaluation, sincethe ISIS-V12 was made to evaluate the technical feasibility of the BSI-ISIS.One of the serious problems is shown in Fig. 6(a). Mechan-ical dicing of the double epiwafer exposes an n-p junction onthe rough dicing edge, which causes a dark stripe along the leftedge, as shown in Fig. 6(a) . The cause is under investigation.One possible cause is recombination of electron signals withholes due to a large number of generation-recombination cen-ters generated by the mechanical dicing close to the photore-ceptive area. This problem can be solved by introducing stealthdicing [4].Since ISIS-V12 is the first test sensor and the evaluationcamera was also made as a trial one, the measured noise level isstillhigh.However, itwillbedecreasedmainlybyimprovementof the evaluation system.IV. I MPROVEMENTS  S UGGESTED BY THE  E VALUATION Based on the experience of the design and the evaluationresults of the ISIS-V12, we have designed a modified layoutof the BSI-ISIS, named ISIS-MV12. As an example, modifica-tions in the design of the global planar structure are shown inFig. 9. To increase the frame rate, the following modificationsare introduced.1) The imaging area is divided into four rectangular subar-eas, instead of four long strips applied to ISIS-V12. A setof driving voltages used in the image-capturing operation,which requires very high frequency, is transferred fromboth side edges toward the vertical center line through  2560 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 56, NO. 11, NOVEMBER 2009 Fig. 8. Images of a quarter of a laser-beam chopper taken by the BSI-ISIS test camera. (a) Images with amplification by CCM. (b) Image with amplification bythe camera amplifier (frame rate: 8 kfps, temperature: − 40  ◦ C).Fig. 9. Architecture of ISIS-MV12 chip. metal inner bus lines. Thus, the length of inner metal buslines on the photoreceptive area is less than a half of thoseof the ISIS-V12, resulting in the  RC   delay less than aquarter of that for the ISIS-V12.2) The inner bus lines are very wide with narrow gapswithout reducing fill factor, which significantly reducesthe resistance.3) Sets of the outer metal bus lines have a special shape,named “thunderbolt bus lines” after their appearance.Driving voltage of each of the major electrodes forultrahigh-speed operation is delivered from a pluralityof the outside driving circuits directly to the plurality of the bond pads on one zigzag-shaped corresponding outerbus line, which significantly reduces the total capacitanceload to each driving circuit. If the outer bus line is rec-tangular and vertically placed as used in common imagesensors, the width of each outer bus line is equal to thatof a bond pad, which makes the total width of the setof the outer bus lines very wide, resulting in erosion of the photoreceptive area and in increase of the resistanceof narrow metal bridges orthogonally placed beneath theouter bus lines (not shown in Fig. 9). The thunderbolt buslines arbitrate this conflict.Simulations predict that the modifications 1)–3) significantlyincrease the frame rate up to 10–20 Mfps.Another modification is that the layout of the readout CCDsequence from the HCCD through the CCM: It was changedfrom a U-turn shape for ISIS-V12 to an L-shape for ISIS-MV12, as shown in Figs. 1 and 9, respectively.Many other modifications are introduced to the global crosssection and the pixel-level designs of the ISIS-MV12 based onthe evaluation of the ISIS-V12.V. C ONCLUDING  R EMARKS In this paper, an ultrahigh-speed and ultrahigh-sensitivityimage sensor is developed.The primary target of the present test sensor was to provethe technical feasibility of integration of three technologies:the ISIS, the CCM, and the backside illumination to achieveboth ultrahigh sensitivity and the ultrahigh frame rate. For theintegration, we developed a special wafer and designed a layoutto create a 3-D potential profile to efficiently transfer signalelectrons, generated by the incident light, from the backside tothe CCD memory on the front side, without direct intrusion ormigration to the memory area.It is confirmed that these new technologies function effec-tively after their integration. For example, it is shown that whenthe CCM is activated at  − 40  ◦ C, a very weak image signalburied under the noise floor can be detected.Based on the evaluation, the design of the image sensor ismodified. The frame rate is expected to exceed 10 Mfps. Manymodifications are employed. Among them, a new electric-connection method “thunderbolt bus line” is expected to beapplied to ICs requiring high power, such as 3-D-stacked ones.
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